[SI-LIST] Re: Looking for Fast Ethernet IBIS File
- From: "Mangipudi, Prasad" <Prasad_Mangipudi@xxxxxxxxxxx>
- To: "'timothy.coyle@xxxxxxx'" <timothy.coyle@xxxxxxx>,si list <si-list@xxxxxxxxxxxxx>
- Date: Thu, 15 May 2003 14:37:01 -0700
Tim,
You can edit the IBIS file to model the differential output. Example
syntax is listed below.
|*****Differential pins definition***************
[Diff_pin] inv_pin vdiff tdelay_typ tdelay_min tdelay_max
E24 E26 0.360V 0ns NA NA
|************end of differential pin definition**
[Diff_pin] is key word and you should give the pin name/number of the
non-inverting pin under this column. Each pin name/number should match the
pin name/numbers already defined previously in the [Pin] section of the IBIS
file.
inv_pin is sub-parameter and you should give the corresponding inverting pin
name/number under this column.
vdiff is again sub-parameter and you should define the differential voltage
under this column for Input or I/O. For differential outputs only, as in
your case, this will be zero.
tdelay_typ, tdelay_min and tdelay_max are again sub-parameters that define
the launch delay of the inverting-pin with respect to the non-inverting pin.
If you enter NA for vdiff, it is interpreted as 0V. If you enter tdelay_typ
as NA, then it is interpreted as 0ns.
This [Diff_pin] definition should follow the [Pin] definitions in the IBIS
file.
The IBIS models for both pins should be identical.
Hope this helps.
Prasad
-----Original Message-----
From: Timothy Coyle [mailto:timothy.coyle@xxxxxxx]
Sent: Thursday, May 15, 2003 8:11 AM
To: si list
Subject: [SI-LIST] Looking for Fast Ethernet IBIS File
Hi,
A colleague of mine is looking for a fast ethernet IBIS file that models the
differential output. It seems some vendors (like Intel) don't model these
pins.
Thanks,
Tim
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