[SI-LIST] Re: Generic question on HSPICE compatibility with CKT netlist....
- From: "Lynne D. Green" <lgreen22@xxxxxxxxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Fri, 06 Jan 2012 22:03:52 -0800
Some possibilities:
* The transistors are wider than the maximum (or
minimum) size allowed in the model file for that model
* the model file is not the correct model file for
the circuit
* the model file is correct, but the model calls
in the circuit are incorrect
Any of these could cause that particular error
message.
Cheers,
Lynne
"IBIS training when you need it, where you need it."
Dr. Lynne Green
Green Streak Programs
http://www.greenstreakprograms.com
425-788-0412
lgreen22@xxxxxxxxxxxxxx
On 1/6/2012 9:41 PM, aruna bathini wrote:
> Hi SIE experts,
> Have a question here :
>
> Using HSPICE for some of the simulations in SIE. I tried using the CKT
> netlist(.sp netlist) and the corresponding model files(nmos, pmos and
> diode) in HSPICE. Model format is .hsp format only but still in HSPICE i am
> getting an error as MODEL LEVELS of the nmos/pmos are not found like
> that.....Can anyone suggest me a best way of using CKT netlist in HSPICE so
> that it will converge and recognize the models of nmos/pmos from the model
> format.
>
> Problem :
>
> EX : For an inverter itself, i am not able to see the proper outputs
> eventhough HSPICE is converging , as the models of the nmos and
> pmos are not used by hspice in the simulation...
>
> Thanks in advance...
>
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