[SI-LIST] Re: Fw: Decoupling capacitor,

  • From: Eddy <eddyvk@xxxxxxxxx>
  • To: si-list@xxxxxxxxxxxxx
  • Date: Sun, 8 Jul 2007 11:33:25 -0700 (PDT)

Hi Steve,

In my job I mostly deal with clock outputs generated
from PLLs. I once made a nice plot of period jitter
versus the distance between the power pins and a
decoupling capacitor. Very interesting exercise! ;-)

I read about that recall....  A lot of consumer
designs are squeezed to the penny. If one (decoupling)
cap can be omitted, it will, sometimes not fully
understanding the risks. Maybe if they didn't make the
games so exciting, the boxes wouldn't be ON so much
and would stand a better chance of living past
warranty. :-)

Sorry for drifting a bit off topic....

Eddy
Fremont CA
www.phaselink.com

--- steve weir <weirsi@xxxxxxxxxx> wrote:
>
> Eddy how far away a capacitor can be depends on the
> interconnect between 
> the capacitor and the load.  Ideally this is
> something that we engineer 
> by design.  Unfortunately it is often something that
> is handled by rote 
> practice.  In the past rote practice often
> overengineered the power 
> system.  These days more often than not it
> underengineers it.  I suspect 
> that failure analysis will find power and thermal
> issues at the heart of 
> Microsoft's current $1.15 billion recall.
> 
> Steve.
> Eddy wrote:
> > "a temporary power feeder in case of power
> shortage" 
> > I think that is nice job description for a
> decoupling
> > capacitor. :-)
> > The problem is impedance of power lines. Distance
> > means inductance and inductors resist fast changes
> of
> > current. When a CMOS buffer changes state, it goes
> > together with a current spike in the power supply.
> > Depending upon the impedance of the power supply,
> > there will be a "negative spike" (dip) in the
> power
> > supply voltage. This dip not only slows down the
> > transition of the CMOS buffer itself but also
> affects
> > other circuits tied to the same power supply
> nearby. A
> > current spike is not just "a frequency" but rather
> a
> > wide spectrum of frequencies. Most chips have lots
> of
> > different circuits all creating total chaos
> ("noise")
> > on the power supply. For most chips it is vital to
> > have a decoupling capacitor as close as possible
> > between the power supply pins of your circuit.
> > Sometimes 10mm distance is already too far. The
> most
> > used decoupling capacitor value has to be 0.01uF
> or
> > 10nF.
> >
> > Eddy
> > Fremont CA
> >
> > --- M Sridhar <sridharam@xxxxxxxxxx> wrote:
> >   
> >> I have a doubt about Decoupling capacitor, I
> >> understand that decoupling capacitor is used to
> >> decouple power supply to the device, so it acts
> as a
> >> temperery power feeder in case of power shortage.
> 
> >> My doubt is how to know at what frequency the
> power
> >> fluctuation would happen?
> >> From were we may get this information.
> >>
> >> Thanks,
> >> Sridhar.
> >>
> >>     
> >
> >
> >        
> >
>
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