Hi all,
Now that I have your attention with the subject title, I would like to seek
your advice on an application of ferrite beads that I have not seen covered
much in either the literature or this list.
I understand that the use of ferrite beads in the PDS without consideration
to the problem (if any) that they are trying to solve is not good
engineering. I have read through much of the discussion of their (mis)use
in PDS, but I have recently started a position in a company that uses them
in multiple applications. One being in the PDS, but I will challenge them
on this.
The other is the use of ferrite beads in the clock lines of crystal
oscillators or clock ICs. I have inquired as to their purpose and was told
that they are there to "slow" the edges of the clock down, or reduce the
magnitude of higher order harmonics.
Consider the case where a 12.0 MHz oscillator is used as the primary clock
source of an MCU that then uses a PLL to increase the core clock rate to
168.0 MHz. The 12.0 MHz clock source has higher order harmonics in the
range of 200.0 MHz which are presumably reduced by the use of the bead.
What is the resulting edge rate at the MCU pins? I haven't yet looked at
the IBIS model for the processor, but I imagine that the harmonics on the
output of the PLL would exceed 168.0 MHz thereby rendering the bead in the
clock line redundant.
My question is if the beads are helping or are redundant?
Your thoughts are appreciated.
Regards,
Dr. Timothy Smith (Ph.D)
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