Hi Matt,
Yes, this is approximately inductance square. The spreading details
matter a lot, and they are also very much frequency dependent, so the
number is fairly approximate, but a good estimate for frequency
signatures on a Bode plot with logarithmic frequency scale.
As it was pointed out, the capacitance of the plane pair also varies
with the spacing, but the static plane capacitance is usually negligible
compared to our bypass capacitors, so the change in plane capacitance
hardly matters.
Regards,
Istvan Novak
Oracle
On 6/23/2016 11:45 PM, Matt Boland wrote:
Hi Istvan,
When you say 330pH plane inductance, are the units for plane
inductance in pH*inch/inch (multiply by length of copper and divide by width
of copper) so the inches cancel or something like that? Like with volume
resistivity where the units are Ohm*metres and you divide by the cross
sectional area of the material and multiply by the length to find the
resistance of a length of the material.
--
Matt Boland
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On
Behalf Of Istvan Novak
Sent: Friday, 24 June 2016 9:25 AM
To: curtmcn@xxxxxxxxx; si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Effect of dielectric spacing between power and ground
Hi Curt,
In its simplest approximation the plane inductance is inversely proportional
to the plane spacing; approximately 33pH for each mil spacing. This means
the 10-mil spacing gives you approximately 330pH plane inductance; 5-mil
spacing gives you half of that and so on. Eventually the complex plane
impedance interacts with the bypass capacitors and other components on
the plane,
creating the impedance profile. For an accurate answer your best bet is
to use
a hybrid solver to calculate the cumulative effect of planes and components.
But behind your question may be something else: are you just curious what
would be the impact of smaller spacing or do you want to look at this
option because
the board with its present stackup does not work well?
There were a lot of discussions about laminate thickness on this forum,
you can find them in the archive. You can also find papers on the
subject at the
Paper download and Quietpower buttons at
http://www.electrical-integrity.com/
Regards,
Istvan Novak
Oracle
On 6/23/2016 6:58 PM, Curt McNamara wrote:
We are looking at a board stack up with 10 mil spacing between the center------------------------------------------------------------------
layers (which are power and ground). It is a 10 layer pcb with continuous
ground planes adjacent to high speed signals. There is ample space for
decoupling.
How can i estimate the effect of reducing the spacing between power and
ground?
Thanks in advance.
Curt
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