Hi Curt,
In its simplest approximation the plane inductance is inversely proportional
to the plane spacing; approximately 33pH for each mil spacing. This means
the 10-mil spacing gives you approximately 330pH plane inductance; 5-mil
spacing gives you half of that and so on. Eventually the complex plane
impedance interacts with the bypass capacitors and other components on
the plane,
creating the impedance profile. For an accurate answer your best bet is
to use
a hybrid solver to calculate the cumulative effect of planes and components.
But behind your question may be something else: are you just curious what
would be the impact of smaller spacing or do you want to look at this
option because
the board with its present stackup does not work well?
There were a lot of discussions about laminate thickness on this forum,
you can find them in the archive. You can also find papers on the
subject at the
Paper download and Quietpower buttons at
http://www.electrical-integrity.com/
Regards,
Istvan Novak
Oracle
On 6/23/2016 6:58 PM, Curt McNamara wrote:
We are looking at a board stack up with 10 mil spacing between the center
layers (which are power and ground). It is a 10 layer pcb with continuous
ground planes adjacent to high speed signals. There is ample space for
decoupling.
How can i estimate the effect of reducing the spacing between power and
ground?
Thanks in advance.
Curt
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