[SI-LIST] Re: Differential Impedance of PCB Vias
- From: "Kai Keskinen" <kalevi@xxxxxxxxxx>
- To: <YTAO@xxxxxxxxxx>, <ihirshtal@xxxxxxxxxx>, <si-list@xxxxxxxxxxxxx>
- Date: Wed, 15 Feb 2006 18:21:12 -0500
Itzhak:
The 630 version of Cadence Allegro PCB SI would allow you to do this
exercise in a few hours and result in a touchstone S parameter file that you
can simulate with in the tool or in any other tool that uses them. As well,
if your PCB is done in Allegro, you could extract and turn into S parameters
any part of your PCB transmission paths to see how to optimize things. It is
very easy to use for this application but pretty pricy. I believe you can
lease the tool for periods as short as a couple weeks.
Cheers,
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of Yuming Tao
Sent: Wednesday, February 15, 2006 11:43 AM
To: ihirshtal@xxxxxxxxxx; si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Differential Impedance of PCB Vias
Hi, Itzhak
I recalled that I read a paper a few years ago talking about the =
creation of the empirical circuit models of via-pair running =
differential signals. The paper was published on IEEE Trans. on MTT or =
else and you should easily find it inside IEEE digital Library.
=20
Based on PCB layout stackup and via dimension (via size, anti pad, =
pad...), Each element of the R/L/C can be calculated using empirical =
formula available on reference books that can be found easily. This =
model can be used as staring point for your circuit simulation. however =
a full-wave simulator should be used to get the 4-port S-parameter file =
of this via-pair to validate the model if possible. What I found is that =
the empirical model is pretty close to the S-parameter model which is =
good enough for multi-gigabit applications. With little tweaking on =
several parameters, this empirical circuit model could be even close to =
S-parameter model. Later on, I used S-parameter model only since I had =
the full-wave 3D simulation tools on hand.
Regards,
Yuming Tao
Altera corp.
=20
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of Hirshtal Itzhak
Sent: Monday, February 13, 2006 7:41 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Differential Impedance of PCB Vias
=20
Hello,
I need to route a 3.125Gb/s 100-ohm diff pair such that it traverses
from one layer of a PCB to another layer through a pair of vias about
100mil long.
I would like to keep the diff impedance of the pair of vias as close to
100-ohm as possible.
How can I estimate the diff impedance of the vias? Is there a reliable
formula to calculate this value out of the self characteristic impedance
of the vias or from their geometrical dimensions?
Thanks for anyone who can contribute
Itzhak Hirshtal
Elta Electronics
Israel
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