[SI-LIST] Re: Differential Impedance of PCB Vias
- From: Hirshtal Itzhak <ihirshtal@xxxxxxxxxx>
- To: gianguida@xxxxxxxx
- Date: Wed, 15 Feb 2006 10:16:22 +0200
Hello Giancarlo,
Instead of simulating in 3D, I assume that in my case I can live with
approximate values, so for evaluating the parasitics and impedance of
vias I am now using H. Johnson's empirical tables appearing on his
advanced SI book. The problem is - the differential impedance has not
been addressed there, and I wonder if there maybe exist some similar
empirical data regarding differential vias!
Itzhak hirshtal
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of Ing. Giancarlo Guida
Sent: Monday, February 13, 2006 3:34 PM
To: Hirshtal Itzhak
Cc: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Differential Impedance of PCB Vias
Hi Itzhak,
in your case
you should take in thye account the overall layout of the via:
pad and antipad dimension,
via radius
presence of stub
via to ground
I doubt you can do this efficiently by using a formula you would be in a
better shape if you could use a 3D solver to find the best layout for
your via.
I am using CST Microwave studio for such a problem and I find it very
efficient.
Giancarlo
Hirshtal Itzhak ha scritto:
>
> Hello,
>
> I need to route a 3.125Gb/s 100-ohm diff pair such that it traverses
> from one layer of a PCB to another layer through a pair of vias about
> 100mil long.
>
> I would like to keep the diff impedance of the pair of vias as close
> to 100-ohm as possible.
>
> How can I estimate the diff impedance of the vias? Is there a reliable
> formula to calculate this value out of the self characteristic
> impedance of the vias or from their geometrical dimensions?
>
> Thanks for anyone who can contribute
>
> Itzhak Hirshtal
> Elta Electronics
> Israel
>
>
>
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