[SI-LIST] Re: Decoupling of Oscillator
- From: pwelling@xxxxxxxxxxxxxx
- To: martin@xxxxxxxxxxxxxx, si-list@xxxxxxxxxxxxx
- Date: Wed, 20 Nov 2002 16:53:51 -0700
Martin,
What I have seen in the past is that with the bead in the ground, you may
get walk-out on the falling edges and possibly the rising edge. This creates
a logic level discernment problem with both input and output logic
interfaced to the isolated device. If fast edges rates and timing budgets
are critical (sometimes not critical if the bead impedance is high enough)
it may fail.
In another company, we tried this with a keyboard controller during a
development test and it had serious timing issues. The ground driven edge
return reference between driving devices and the isolated device caused a
delay. In the non-ground isolated scheme, the energy returns on the ground
or through the high frequency decoupling capacitor on VCC' to ground.
I particularilly would refrain from doing this on clocks.
If you want to keep a clock (oscillator) ground clean, you might want to try
a noise gate (moat and bridge) for the ground to steer currents in and out
of the device. If you do this, the VCC bead crosses over the moat and you
should run the output trace across the bridge to maintain a return path for
the output. The decoupling capacitors on the oscillator side should be
referenced to the internal (oscillator side) ground and the other capacitors
should be on the "raw" ground side of the VCC bead. In this case the 2nd
drawing works well.
EMI/EMC levels of drawing 2 are acceptable, better if the rest of the CCA is
properly designed.
Philip Ross Wellington
Mgr. Signal Integrity & EMI
L-3 Communications CSW
-----Original Message-----
From: Martin Euredjian [mailto:martin@xxxxxxxxxxxxxx]
Sent: Wednesday, November 20, 2002 3:31 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Decoupling of Oscillator
From: Philip Ross Wellington
> Some provided Pi filters for the
> ground but that didn't work well logically because of the return path
> inductance and Signal Integrity (not even coined back then) induced
> problems.
On datasheets I've seen recommended isolation/filtering networks that look
like this:
(values chosen at random)
RAW_VCC -----------BEAD-------------- VCC'
| | | |
| | | |
22uF 0.1uF 0.1uF 22uF
| | | |
| | | |
RAW_GND -----------BEAD-------------- GND'
versus:
RAW_VCC -----------BEAD-------------- VCC'
| | | |
| | | |
22uF 0.1uF 0.1uF 22uF
| | | |
| | | |
RAW_GND ----------------------------- GND'
Is there any merit to the first approach, say, for a clock, or a device with
a PLL, or a sensitive analog sub-section? Both in terms of circuit
operation and EMI/RFI concerns.
I've also seen a couple where the beads are replaced with low or 0 ohm
resistors.
Thanks,
===============================
Martin Euredjian
eCinema Systems, Inc.
voice: 661-305-9320
fax: 661-775-4876
martin@xxxxxxxxxxxxxx
www.ecinemasys.com
===============================
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