[SI-LIST] Re: Decoupling of Oscillator
- From: pwelling@xxxxxxxxxxxxxx
- To: Tegan.Campbell@xxxxxxxxxxx, si-list@xxxxxxxxxxxxx
- Date: Thu, 21 Nov 2002 17:06:52 -0700
Tegan,
Assume you have a High Logic level that is transitioning from a High to a
Low. Normally, a monotonic edge will fall at an even slope to a Low.
-------
\
\
\
\
\
\
\
\
\
\
\
\
-----------
When walk-out occurs, the edge falls with a normal slope until it "plateaus"
for a time then completes the rest of the falling slope to the ground
reference.
Pictorially, it would look like this:
--------
\
\
\
\
\
\
\
------
\
\
---------
Notice how it "walks-out" during the end of the transition.
This occurs quite often on a loaded AC-Terminated (R-C method) net at the
end of the net due to the capacitance "recharging" the line. In this case it
is caused by the extra long return path caused by the bead.
This is a different effect from looking at the drive end of a series
terminated net. In that case the plateau is based on Ro+Rs versus Zo AC
voltage division.
As to your design, if you ** must ** provide for a bead and you have not
selected one yet... You would want to know the current requirements of the
circuitry, IDLE and Operating. You need to determine what frequencies you
want to keep in/out of the circuit (consider both high frequencies like
PLLs, Phase Detectors, edge rates, and low frequencies to maintain jitter
requirements). Select a bead that will have the additional capacity AND the
desired Impedance (this means overkill on the bead because as current is
passed through a surface mount bead, the impedance degrades severely). It is
best to specify the bead on the lower end of the higher impedance of the
curve at the expected current. Determine the correct decoupling capacitors
both high and low frequency - 0.1 uF may not be what you are looking for if
you have a high rate clock. Make sure you have bulk low frequency tantalum
for the reasons above.
When you have done all of this, place a Zero Ohm resistor (of appropriate
wattage) across the bead (or pads) so that you can defeat it when you have
problems. Try with just the resistor first. Populate the bead if you need
it.
This will at least help you get the layout going.
Philip Ross Wellington
Mgr. Signal Integrity & EMI
L-3 Communications CSW
-----Original Message-----
From: Tegan Campbell [mailto:Tegan.Campbell@xxxxxxxxxxx]
Sent: Thursday, November 21, 2002 9:21 AM
To: 'pwelling@xxxxxxxxxxxxxx'; si-list@xxxxxxxxxxxxx
Subject: RE: [SI-LIST] Re: Decoupling of Oscillator
Philip,
Could you give us your definition of walk-out?
I don't think I've ever heard that term.
Don't mean to be impolite, but there has been a lot of discussion on this
forum lately about abuse/misuse of terms.
I'm dealing with this problem now(recommendation from the vendor is to use
beads on both Vdd and Vss) and I need to nail this spin.
BTW, relevant to the discussion of "how many" spins a couple weeks ago, this
is the second. It's a clean up and integrating a ASIC rev.
Thanks to everyone for the wealth of info in this forum,
Tegan
-----Original Message-----
From: pwelling@xxxxxxxxxxxxxx [mailto:pwelling@xxxxxxxxxxxxxx]
Sent: Wednesday, November 20, 2002 4:54 PM
To: martin@xxxxxxxxxxxxxx; si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Decoupling of Oscillator
Martin,
What I have seen in the past is that with the bead in the ground, you may
get walk-out on the falling edges and possibly the rising edge. This creates
a logic level discernment problem with both input and output logic
interfaced to the isolated device. If fast edges rates and timing budgets
are critical (sometimes not critical if the bead impedance is high enough)
it may fail.
In another company, we tried this with a keyboard controller during a
development test and it had serious timing issues. The ground driven edge
return reference between driving devices and the isolated device caused a
delay. In the non-ground isolated scheme, the energy returns on the ground
or through the high frequency decoupling capacitor on VCC' to ground.
I particularilly would refrain from doing this on clocks.
If you want to keep a clock (oscillator) ground clean, you might want to try
a noise gate (moat and bridge) for the ground to steer currents in and out
of the device. If you do this, the VCC bead crosses over the moat and you
should run the output trace across the bridge to maintain a return path for
the output. The decoupling capacitors on the oscillator side should be
referenced to the internal (oscillator side) ground and the other capacitors
should be on the "raw" ground side of the VCC bead. In this case the 2nd
drawing works well.
EMI/EMC levels of drawing 2 are acceptable, better if the rest of the CCA is
properly designed.
Philip Ross Wellington
Mgr. Signal Integrity & EMI
L-3 Communications CSW
-----Original Message-----
From: Martin Euredjian [mailto:martin@xxxxxxxxxxxxxx]
Sent: Wednesday, November 20, 2002 3:31 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Decoupling of Oscillator
From: Philip Ross Wellington
> Some provided Pi filters for the
> ground but that didn't work well logically because of the return path
> inductance and Signal Integrity (not even coined back then) induced
> problems.
On datasheets I've seen recommended isolation/filtering networks that look
like this:
(values chosen at random)
RAW_VCC -----------BEAD-------------- VCC'
| | | |
| | | |
22uF 0.1uF 0.1uF 22uF
| | | |
| | | |
RAW_GND -----------BEAD-------------- GND'
versus:
RAW_VCC -----------BEAD-------------- VCC'
| | | |
| | | |
22uF 0.1uF 0.1uF 22uF
| | | |
| | | |
RAW_GND ----------------------------- GND'
Is there any merit to the first approach, say, for a clock, or a device with
a PLL, or a sensitive analog sub-section? Both in terms of circuit
operation and EMI/RFI concerns.
I've also seen a couple where the beads are replaced with low or 0 ohm
resistors.
Thanks,
===============================
Martin Euredjian
eCinema Systems, Inc.
voice: 661-305-9320
fax: 661-775-4876
martin@xxxxxxxxxxxxxx
www.ecinemasys.com
===============================
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