[SI-LIST] Re: DDR-1 termination (short point-to-point)
- From: Ravinder.Ajmani@xxxxxxxxxxxxxx
- To: af@xxxxxx
- Date: Fri, 4 Feb 2005 08:59:57 -0800
Anders,
I have used DDR1 in point-to-point application on several designs. The
trace length is about 1.8" and the only termination I use is a series
resistor on Strobe and Data lines at the DRAM end, since my ASIC drivers
are weaker than the DDR drivers. Frankly I do not have card real estate
to implement full DDR termination methodology. The only problem I
experienced was in my very first design due to crosstalk, as I had not
done crosstalk simulation under worst switching conditions. Hence it is
good to simulate your topology under different conditions, and also to
choose the right termination value.
Regards, Ravinder
Server PCB Development
Hitachi Global Storage Technologies
Email: Ravinder.Ajmani@xxxxxxxxxxxxxx
"Anders Frederiksen" <af@xxxxxx>
Sent by: si-list-bounce@xxxxxxxxxxxxx
02/03/2005 02:00 PM
Please respond to af
To: si-list@xxxxxxxxxxxxx
cc:
From: si-list-bounce@xxxxxxxxxxxxx
Subject: [SI-LIST] DDR-1 termination (short point-to-point)
I'm connecting a lot of DDR1 ram to a FPGA (Virtex2pro). Common
schemes recommended is "embedding a DIMM design" (which would be
plain stupid imho) and doing a full parallel termination in both ends
(typically in 0402). The latter is naturally sensible - but it occurs
to be kind of a overkill for ponit-to-point lines of "only" 5cm (~2")
or less. Has anyone experience with simpler termination schemes? I
mean for standard busses one would rely on slow drivers only...
Cheers,
Anders
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