[SI-LIST] Re: DDR termination
- From: Todd A Cannon <tacannon@xxxxxxxxxx>
- To: electronbob2@xxxxxxxxxxxxx
- Date: Thu, 13 May 2004 16:54:42 -0500
Hi, Bob
I will assume for this post that you have been looking at boards which
contain DDR1 components and a Vtt regulator.
I have seen and used various series termination values from 10 to 47 Ohms.
Controllers from different vendors have various I/Os and the net structure
might not always be what the chip designers had expected. Some controllers
have a programmable output impedance which makes things even more
interesting. Therefore, these nets should be simulated for optimum series
termination value selection. My second choice would be to follow a design
guide published for the controller you intend to use. A typical and
popular series termination value that I have seen is 22 Ohms, but there are
no "rules" when choosing these values. However, JESD79D does state that
there is a maximum Volt-ns level which can appear on DRAM pins (ringing or
over/under shoot). It also states the minimum slew rate which must be
present at the DRAM pin. The series termination value selection will
affect both of these parameters.
Vtt termination values can range typically from 56 to 100 Ohms (or as low
as 27 as you observed) for a dedicated Vtt regulator and up to 300 Ohms
up-and-down for a divider configuration. Again, the values you are seeing
might be based on design guides, simulations or even duplication.
Capacitors are sometimes used for edge rate damping, timing tweaks, etc.
but personally I stay away from them and try to design the net structures
correctly to avoid the need for caps.
Regards,
Todd Cannon
IBM Engineering & Technology Services
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