[SI-LIST] Re: DC/DC converter output dip
- From: Priyawrat Dewasthalee <dpriyawrat@xxxxxxxxx>
- To: "'si-list@xxxxxxxxxxxxx'" <si-list@xxxxxxxxxxxxx>
- Date: Wed, 6 Aug 2003 08:03:00 -0700
Hi Brad/all,
I would love to hear about methods for in-depth analysis of
DC/DC converters (switching) from purely control system
perspective, viz.phase margin, etc.
Any pointers:books/weblinks/tutorials etc. with theory and some
examples would be great.
Thanks,
regards,
- Priyawrat
-----Original Message-----
From: Bradley S Henson [mailto:bhenson@xxxxxxxxxxxx]
Sent: Wednesday, August 06, 2003 19:45
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: DC/DC converter output dip
Jean-Pierre,
I think most will agree that power distribution goes hand in hand with SI.
I'm not sure I really understand your circuit, but it sounds like you may
have a marginally stable control system problem. Perhaps your monitoring
circuit and subsequent FET are reducing the loop phase margin? You might
consider checking the phase margin of the converter with and without the
monitor circuitry connected. We usually compensate our regulators for at
least 45 degrees phase margin (and 10db gain margin if I recall) at end of
life. However, it would probably take a lot less than this to cause the
oscillation you are describing.
regards,
Brad Henson
Raytheon
Jean_Pierre.Bouthemy
@alcatel.fr To:
si-list@xxxxxxxxxxxxx
Sent by: cc:
si-list-bounce@freel Subject: [SI-LIST] DC/DC
converter output dip
ists.org
08/06/2003 02:06 AM
Please respond to
si-list
Hi SI experts,
This is a problem more relative to power distribution system than signal
integrity.
On the current design I am trying to debug, the output of a DC/DC converter
(non isolated, 3.3Vin, 2.5Vout) dips from 2.5V down to about 1.5V every 90
ms (around 11Hz resonance).
I am unable to find where it can come from !! This 2.5V supply voltage is
monitored whit a comparator circuit in order to drive Mosfet after the
DC/DC converters on my board. The resistor divider is made with 1K74
(between input+ of aop and 2.5V) and 2K43 (between input - of aop and
ground). A 10nF capacitor is used between both resisitors. A strange
phenomenon is that when i remove the 1K74 resistor (thus the 2.5V is no
more monitored), the 2.5V output is then OK (no more dips !!). Just like if
the comparator circuit disturbs my DC/DC output ! But why?
An other information that could help you is that the output capacitors are
100nF in parallel with 4.7uF in parallel with 100uF (I have the same caps
on other DC/DC converters and I have no problem).
Has anybody ever seen that?
Thank you for your help.
Regards.
Jean-Pierre
--------------------------------------------------------------------
Jean-Pierre BOUTHEMY
Hardware Design Engineer
ALCATEL - Mobile Networking Division (MCG)
Mobile Core R&D
+33 (0)2 99 26 08 18
mailto:jean_pierre.bouthemy@xxxxxxxxxx
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