Hi All, I can simulate and observe how far the reference plane should be from Ac coupling capacitorâs mounting layer to shun impedance discontinuities. Is this workable by hand ⦠Sqrt (L/C) is my characteristic impedance and area/distance is my capacitance. If I am able to compute cumulative inductance, then I can quickly see the capacitance to get 50 ohm impedance, consequently, I can get my plane cut out distance. My question is how to calculate the cumulative inductance of DC blocking capacitor. Is my ESL and parasitic inductance sufficient? Or should I consider solder+vias (if any) also. Any other implication? Regards bala ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List forum is accessible at: http://tech.groups.yahoo.com/group/si-list List archives are viewable at: //www.freelists.org/archives/si-list Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu