[SI-LIST] Re: Buried Capacitance thread comments (The whole thing)
- From: MikonCons@xxxxxxx
- To: ldsmith@xxxxxxxxxxxxxxxxxx, si-list@xxxxxxxxxxxxx
- Date: Mon, 3 Dec 2001 16:17:01 EST
Sorry about the mud, guys. Now "bygones."
Re: Larry's comments on high frequency energy making it to the board and
causing EMI problems, this is and has been a major issue with all higher
frequency processors. The 200 MHz limit that (to quote Larry) "some one"
specified is constantly violated by processors. The original (pre-production)
AMD K6 processor packages (prototyped by IBM, certainly a competent
manufacturer) exhibited a package resonance at 750 MHz that (per the mode
conversion phenomenon aptly noted by Scott McMorrow) leaked (or actually ran
rampant) onto the PCB and was very nicely characterized by EMI radiated
emission tests.
This problem was measured, characterized, modeled, and correctly simulated
for an indepth understanding. Multiple in-package filter alterations were
modeled and evaluated that offered attenuation exceeding 60 dB. But power
carrying ability of the resulting structure posed lower practical limits to
lower levels (as noted by Larry). And, as most of us know, on-die decoupling
capacitance goes a long way to reducing the resonant frequency and containing
the higher frequency currents on the chip.
My (years ago) analyses of this problem clearly demonstrated the need (and
the potential) for innovative package design that is still an ongoing issue
for all processor manufacturers. Grounded heatsinks on these chips have
provided a field interseptor and shielding improvement for some of the
energy, but thin dielectric planar decoupling is a critical element on the
PCB to resolving EMI problems beyond the control of the processor package
designer.
Mike
Michael L. Conn
Owner/Principal Consultant
Mikon Consulting
Cell: (408)821-9843
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