Abhijit, I am not sure if you are performing measurements or simulations. If you are performing simulations just run the simulation far enough out. If you are getting IBISCHK errors because of excessive currents, once you are well outside the operating region you can limit the current to some resonably high value like 1 amp (the part would melt first). If you are measuring parts and do not want to damage a part you could extrapolate the points of the linear region after you are well pass the knee. I am not aware of any established methods for doing this. bob -- Robert J. Haller (rhaller@xxxxxxxxxx) Principal Consultant Signal Integrity Software Inc. 6 Clock Tower Place, Suite 250 Maynard, MA 01754 Phone: (978) 461-0449, ext 15 Abhijit Mahajan wrote: > Bob, > > Thanks for your reply. I am glad you understand my situation. However > I did not quite understand the last part of your email. > > Are you suggesting that one should interpolate the curve and > approximate it as a linear ramp beyond the inital diode "Knee" ? > > If yes, are there any established methods for doing so? > > Thanks again! > > Abhijit. > > > > > > Robert Haller wrote: > >>Abhijit, >> The IBIS spec requires you to model a curve from -Vcc to +2Vcc. >>This is well beyond the rail voltages (and can often Melt silicon :-) . >> Many people do not correctly model clamp curves. One of the reasons >>is often CMOS I/O cells contain a lateral PNP structure that has >>spreading resistance. This manifests itself by modifying the actual >>behavior of the ESD clamp structures. I spent a significant amount of >>time working with a semiconductor vendor to get this right. Even if they >>extract their ESD clamp diode structures accurately, they may miss the >>vertical PNP's. >> Practically The important parts of the clamp model is the turn on >>behavior and resulting Slope. Theoretically you need to get enough >>points on the "turn on" and to establish a slope. If you don't want the >>a tool to interpolate do the sweep from -VCC to +2 Vcc. >>Regards, >>Bob >> -- >>Robert J. Haller (rhaller@xxxxxxxxxx) >>Principal Consultant >>Signal Integrity Software Inc. >>6 Clock Tower Place, Suite 250 >>Maynard, MA 01754 >>Phone: (978) 461-0449, ext 15 >> >>Volk, Andrew M wrote: >> >>>It is important if your signal goes any significant amount beyond the rail. >>>Series terminated buses like PCI depend on the clamping diodes for signal >>>integrity, to stop excessive reflections that can also impact timing. Some >>>interfaces depend on them to limit the voltage swing at the receiver to safe >>>limits on newer processes. If you need to check for these kind of effects, >>>the clamps are essential. >>> >>>Andrew Volk >>>Intel Corp. >>> >>>-----Original Message----- >>>From: Abhijit Mahajan [mailto:amahajan@xxxxxxxxxxxx] >>>Sent: Thursday, October 17, 2002 11:15 AM >>>To: si-list@xxxxxxxxxxxxx >>>Subject: [SI-LIST] Beyond Rail Operation in IBIS >>> >>> >>> >>>It is often difficult to get accurate curves for beyond rail >>>operation of IO Buffers. The problem is mainly in diode models that >>>are not accurate and results in 100s of Amps of current. >>> >>>I am sure this question has been asked before, >>> >>>"How important is it to have accurate beyond rail curves? Does the IBIS >>>spec. allow models to not have IV curves beyond rail voltages?" >>> >>>Thanks for your help. >>> >>>Abhijit. >>> ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu