Henrik, If your board works well and the only reason to make it thicker is mechanical stability, you could also consider adding a stiffener, a frame or tray. If it works, dont mess with it.:-) Regards, Istvan On 3/2/2011 5:03 PM, Henrik Gildå wrote: > Hello SI-gurus! > > As a hobby project I've designed my own graphics card because I wanted > to. :) Among other things it features a six layer board and the > protypes seem to work very well, but the PCB is only 1mm thick. I've > realized that I need to make it thicker before I produce it to a > selected few who have expressed interest in buying it. I've been > thinking about two ways to make the board thicker and hope I can get > some input from you about what I might have missed regarding the pros > and cons for the two alternatives. :) > > This is what the stackup looks like today: > > --- TopSignal (Features Spartan3 in BGA, two DDR2 memories at > 200MHz, DVI transmitter chip with impedance matched routings, DAC at 240MHz) > --- 66um FR-4 > --- TopGND (several digital GND planes, DC/DC GND, analog GND) > --- 250um FR-4 > --- MidPower (1.2V for FPGA, 3.3V, 2.5V, 1.8V, 5V) > --- 230um FR-4 > --- MidSignal (some DDR address signals impedance matched with signals > on top and bottom layer, as well as some extra power planes that > wouldn't fit in MidPower) > --- 250um FR-4 > --- BottomGND (digital GND, DC/DC GND, analog GND) > --- 66um FR-4 > --- BottomSignal (Features Spartan3 core decoupling caps, DDR2 data > lines with controlled impedance, etc) > > Now I have come up with two alternatives to make this stackup thicker: > 1) Increase the 250um between the TopGND-MidPower and > MidSignal-BottomGND layer pairs to 550um each. This way I keep the > concept of tight layer pairs at the top, middle and bottom. > 2) Instead increase the distance between the MidPower and MidSignal > layers a lot and decrease the 250um parts to 66um. This way I get three > layers packed tightly at the top (TopSignal, TopGND, MidPower) and three > layers packed tightly at the bottom (MidSignal, BottomGND, BottomSignal). > > In the first alternative this would increase the impedance of the DDR > address signals in the MidSignal layer by around 10% according to my > calculations. > > In the second alternative I think I would get even better high-frequency > performance out of the power supply planes (MidPower) because the ground > plane (TopGND) is so close. But the components and caps on the bottom > layer would have very long vias to reach the power plane. > > Any thoughts about this would be greatly appreciated. :) > > Regards > Henrik > > > ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List technical documents are available at: http://www.si-list.net List archives are viewable at: //www.freelists.org/archives/si-list Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu