Hello,
maybe I misunderstood already the other question (Why to have smaller
tSH when having a slower slewrate?), and maybe I'm also
misunderstanding the first question of the post.
But If I understand the first question right the answer is quite simple:
Your system needs to fulfill (at least) one of the three requirement
(tSH at AC175, AC150 or AC135). Which one is up to you!
So some systems will have more voltage margin where you might want to
use tSH at AC175 other System might have better timing margin so you
want to compare these vs. tSH at AC135.
Guess the other question on the higher slew rates was answered already ..
But if you have these slew rates usually you have anyhow no problem
with tSH (as long you do have no severe reflections)
Hermann
Seminar "Open the Black Box of Memory" (13.-14.042014 and
15.-16.04.2015) in Stockholm Sweden
EKH - EyeKnowHow
Hermann Ruckerbauer
www.EyeKnowHow.de
Hermann.Ruckerbauer@xxxxxxxxxxxxx
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Am 15.04.2015 um 19:47 schrieb Conrad Herse:
You can also use simple math to derive a derating value forTo unsubscribe from si-list:
different slew rates >1V/ns. First derate the AC level to Vref at
1V/ns, then derate your actual slew rate to Vref such that it
intersects Vref at the same point, e.g. for an AC150 level with a
3V/ns slew rate the derating factor would be:
150 - (150/3) = 100ps
Conrad Herse Alcatel-Lucent
On 4/15/2015 11:34 AM, Moran, Brian P wrote:
Krishna,
There are two factors which effect which threshold to assume.
First is that the AC and DC thresholds can change depending on
speed bin. At higher speed bins the threshold tend to get
tighter. The tighter thresholds help enable the higher speeds.
Then within each speed bin you have a standard AC threshold and a
reduced AC threshold, which evokes a setup penalty. The lower
threshold can produce better margins, despite the penalty, in
heavy loading cases where slew rate is very slow and/or eye
height is small.
As far as derating at slew rates above 2V/ns, technically the
derating continues the increase above 2V/ns, based on the
original derating theory, but some empirical data suggests you
can freeze derating at the value shown for 2V/ns with minimal
risk.
Brian Moran Intel Corporation
-----Original Message----- From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx] On Behalf Of Arjun Krishna
Sent: Wednesday, April 15, 2015 9:12 AM To:
si-list@xxxxxxxxxxxxx Subject: [SI-LIST] Ac threshold timings
Hi Experts Here's my question. In ddr3 simulation I have come
across AC175, AC150 & AC135.
I have confused, How these threshold can be chosen how the
designers consider these spec. and when to apply. Is there any
standard specified.
How the derating values are are considered, Means my slew rate
measurement is 4.9v/ns sec but the max specified is 2v/ns. Which
value I should as the base value.
I'm. awaiting for your replies
Krishna.
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