[SI-LIST] AW: Pin vs. Die
- From: "Havermann, Gert" <Gert.Havermann@xxxxxxxxxxx>
- To: "liviu-dumitru.craciun@xxxxxxxxxx" <liviu-dumitru.craciun@xxxxxxxxxx>, "ralph.wilson@xxxxxxxxxxxxxxxxxx" <ralph.wilson@xxxxxxxxxxxxxxxxxx>, "si-list@xxxxxxxxxxxxx" <si-list@xxxxxxxxxxxxx>
- Date: Fri, 9 Jan 2015 15:13:26 +0000
The Signal at the Receiver Pin can't be worse than the Signal received at the
Die. Bond wires and Packages are not made to improve signal quality.
But depending on which measurement method you use, you can measure different
Signal quality. This is especially true for BGA "Pins" as they strongly couple
to surrounding pins, and if you measure at the BGA Pad without any Ball being
in place, then results will look different, and given the fact that the Probe
pitch for the measurement is huge there are many other factors influencing your
measurement.
And even in simulation some probes influence the results.
I wouldn't trust any measurement showing me a passive Package that improves my
Signals quality.
BR
Gert
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-----Ursprüngliche Nachricht-----
Von: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] Im
Auftrag von Craciun, Liviu-Dumitru
Gesendet: Freitag, 9. Januar 2015 15:59
An: ralph.wilson@xxxxxxxxxxxxxxxxxx; si-list@xxxxxxxxxxxxx
Betreff: [SI-LIST] Pin vs. Die
If the signals at the pins meet the specs, but the signals at the die don`t ...
I suspect that the design margins are too restrictive or the solution isn`t
centered in the tolerance window.
In my opinion the final PRACTICABLE solution should be "good enough" for booth,
waveforms at the pins and the die.
First prio should be the waveforms at the die.
The devil`s advocate versus PCB designer ... "theorist" versus practitioner.
The eternal dilemma in the PCB design is:
"How many theory supports the practice ?"
"How many theory needs the practice ?"
Best regards,
Liviu Craciun
Harman Becker Automotive Systems GmbH
D-76307 Karlsbad, Germany
=======================
-----Ursprüngliche Nachricht-----
Von: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] Im
Auftrag von Ralph Wilson
Gesendet: Freitag, 9. Januar 2015 15:07
An: si-list@xxxxxxxxxxxxx
Betreff: [SI-LIST] Re: Pin vs. Die
Let me throw in a devil's advocate alternative rationale, as I'm involved in
the discussion with Conrad. First of all, I agree that generally the signal at
the die is what we really want to "make good". However, in this particular
case, using ibis and package models that we trust, we are seeing DDR3 signals
that are ringing back below the
Vin(ac) levels.
At the die the signals are actually ringing back below Vref (well below
Vin(dc)). However, at the pin the signals remain above Vin(dc). Hence, at the
die the signals fail, but at the pin the signal is ok. The devil's advocate
argument goes that the vendor has spec'd the device at the pins. Hence, if we
meet the SI at the pin, we can make an argument that we've met the device specs
and the system ought to work. If there's a problem it is the device vendor's
(package) issue, not a PWB design issue (ignoring the fact that we're trying to
make the system work, not point fingers). In other words, do we do something
"strange" or "abnormal" to the PWB to compensate for the package parasitics in
order to clean up the signal at the die (and likely screw up the signal at the
pin)? Or, keep the PWB routing clean and have good signals at the pin but not
at the die?
I argue for the latter.
Ralph Wilson
Alcatel-Lucent
On 1/9/2015 7:33 AM, Conrad Herse wrote:
> Thank-you everyone for your replies, the consensus opinion is
> consistent with mine - "it's the die that matters". The reason I
> brought this up is that we're working on this situation right now: a
> design with better SI quality at the pin than the die. I continue to
> advocate that it's the die that matters, but questions are being asked
> if that's too conservative.We will continue to scrutinize the
> implementation and models to try and improve our results.
>
> If anyone has a dissenting opinion I would be very interested in
> hearing about it and any supporting data behindthe position.
>
> Thanks!
>
> Conrad Herse
> Alcatel-Lucent
> Conrad.Herse@xxxxxxxxxxxxxxxxxx
>
> On 1/9/2015 3:10 AM, Craciun, Liviu-Dumitru wrote:
>> Hi Todd.
>> I agree "signal quality at the die is what matters".
>> Yet I make simulation ONLY at the die and at some test points.
>>
>> To compare the simulations results with the measurements we place
>> test points somewhere on the transmission lines.
>> The position is NOT important !!
>> Why ?
>> The simulation tool is able to show the waveform at the test point,
>> with and without the influence of the scope probe.
>>
>> If the measurements at the TP are in concordance with the simulation
>> results WITH the influence (with the load) of the scope probe ... then the
>> simulation reflects the reality.
>> So, the waveforms at the die will be "identical" with the simulation results.
>> Clear, plus minus tolerances.
>>
>> Best regards,
>> Liviu Craciun
>> Harman Becker Automotive Systems GmbH
>> D-76307 Karlsbad, Germany
>>
>> -----Ursprüngliche Nachricht-----
>> Von: si-list-bounce@xxxxxxxxxxxxx
>> [mailto:si-list-bounce@xxxxxxxxxxxxx] Im Auftrag von Todd Westerhoff
>> Gesendet: Donnerstag, 8. Januar 2015 21:26
>> An: si-list@xxxxxxxxxxxxx
>> Betreff: [SI-LIST] Re: Pin vs. Die
>>
>> Conrad,
>>
>> Interesting question. Ultimately, it's the signal at the die that
>> matters, because that's the signal that gets received and processed.
>> Anything else is well, just, something else.
>>
>> My experience matches yours - having poor signal quality at the pin
>> but acceptable quality at the receiving die is common, but the other
>> way around is rare. Uncommon enough that I can't remember the last time I
>> saw it.
>>
>> In years past, I've seen metrics that assessed signal quality at the
>> pin, in an effort to assure that signal quality at the die was
>> acceptable. This was a measurement-based methodology and I don't think it's
>> in use anymore.
>>
>> My vote - signal quality at the die is what matters.
>>
>> Todd.
>>
>> Todd Westerhoff
>> VP, Semiconductor Relations
>> Signal Integrity Software Inc. • www.sisoft.com
>> 6 Clock Tower Place • Suite 250 • Maynard, MA 01754
>> (978) 461-0449 x24 • twesterh@xxxxxxxxxx
>>
>> “I want to live like that”
>> -Sidewalk Prophets
>>
>> -----Original Message-----
>> From: si-list-bounce@xxxxxxxxxxxxx
>> [mailto:si-list-bounce@xxxxxxxxxxxxx] On Behalf Of Conrad Herse
>> Sent: Thursday, January 8, 2015 3:04 PM
>> To: si-list@xxxxxxxxxxxxx
>> Subject: [SI-LIST] Pin vs. Die
>>
>> Historically, when performing PCB SI (ibis) simulations I've always
>> focused on the SI quality of a signal when measured at the die of a
>> receiving device, if a signal needs to be monotonic I've ensured it's
>> monotonic at the die rather than at the pin. On (rare) occasions I've
>> encountered instances where simulations show a signal to have
>> acceptable SI at the pin but not the die, for these cases I've always
>> worked to find improvements to achieve acceptable SI in the die waveform.
>>
>> Questions have been raised recently as to whether achieving good SI
>> at the pin of a device is adequate, without careful regard to the SI
>> of a waveform at the die. The rationale behind this being that
>> datasheet specifications were traditionally considered at the pin of
>> a device. The reasoning goes that if good SI is achieved at a device
>> pin this meets the datasheet specifications and no further improvements
>> should be needed.
>>
>> I personally do not subscribe to this line of reasoning but would be
>> interested in hearing feedback from others on this.
>>
>> Thanks,
>>
>> --
>> Conrad Herse
>> Alcatel-Lucent
>> Conrad.Herse@xxxxxxxxxxxxxxxxxx
>>
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