[SI-LIST] Re: AW: Just a simple question
- From: afu <afu@xxxxxxxxxxxxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Tue, 24 Jul 2012 00:30:27 +0100
Hello Steve,
first of all, I am writing in English, as I hope, and I told you, that I
have downloaded
the file as PDF to the files > General Uploades VIA_SKIN.PDF !
There you can download it !!!
I know, that "The SI-LIST does not support attachments", but it allows
downloads to the file area.
If you would be so kind, and look to it, then you will agree, that the
way "how" the current will flow over the
surfaces of the via will not depend on the "far field" of the return path.
The "near field, which is working in terms of the skin effect and the
ways of current pathes forced by the
magnetic field of the own forward current in dimensions of zenth of
millimeters will be by far greater in
the location of the via, as the current flowing in a distance of ca. 50
mm. The magnetic field is decreasing with
1/r ( r is the distance from the wire) with a start position of reltive
1 on the surface of the wire.
I think and hope, that you will not tell me that the influence of the
"far field" source is in any way relevant for the
very local skin effect!
Herbert
Am 23.07.2012 23:48, schrieb steve weir:
> Herbert, there is an apparent impasse where you rely on the incorrect
> idea that in a PCB you can arrange things so that the "return path is
> far, far away from the forward path". You should review the
> presentation that Brad Brim linked to correct that wrong idea. What you
> may be thinking is that if you have conductors spaced very far apart
> that incremental increases in distance doesn't affect things much. That
> is true, but rather impractical in the context of a PCB.
>
> The SI-LIST does not support attachments.
>
> Steve.
>
> On 7/23/2012 3:11 PM, afu wrote:
>> Hello Steve,
>>
>> as I have understood the answers of both mentioned members, like from
>> the others, have all stated
>> that the return path is a main factor in the current flow. I tried to
>> explain, that the return path is far, far
>> away from the forward path. Without a visual tool, to describe my model,
>> I used the way of verbal
>> description, which leaded to philosophical answers.
>>
>> But even the idea of Orin, to use Sinnet to answer my question, dows not
>> help because the Sonnet world
>> is equipped with only two dimensional traces in a 3D view.It shows same
>> current densisty on both viewable
>> sides ;-((( This means, that Sonnet tells the currentflow on top and
>> bottom of the trace and inside and outside
>> the via is the same ??!!
>>
>> By the way, my original question mentioned the term of "sides of the
>> trace" and not sides or layers of a multilayer .
>>
>> So... finaly I have uploaded VIA_SKIN.PDF .... a 1:1 image of the
>> thinking model.
>> It contains a pad on top and bottom side each, a trace on the top side
>> to tze middle of the board,
>> a via from top to bottom layer, a trace to a resistor pad on the lower
>> edge ( only for those how need it to
>> satisfy their need of a logical circuit), then traces on the lower side
>> to the sides back the edges and
>> closing to the lower pad.
>>
>> You will agree, that the current flow in the forward path in my question
>> is not affected by the current flow
>> and fields generated by the return path and that currents on the return
>> path.
>>
>> Herbert
>>
>>
>> Am 23.07.2012 21:55, schrieb steve weir:
>>> Herbert, with all due respect, the original question was imprecise, and
>>> included some false assumptions. There were several answers that
>>> offered very good information concerning signal transitions through
>>> multilayer boards, in particular from Brad and Orin.
>>>
>>> Steve.
>>>
>>> On 7/23/2012 10:16 AM, hws wrote:
>>>> Hello Wolfgang,
>>>>
>>>> I before asked a not so simple question, and the answering people were
>>>> answering to quite a different question ( "vias and current pathes" ),
>>>> at least
>>>> it seamed to be like this.
>>>> Therefore this simple and stupid question was a way for me to find out,
>>>> if here
>>>> are people that read and think and .... then answer.
>>>> I do not want to unpolite against the others... but I am a little bit
>>>> frustrated from their
>>>> answers.
>>>> Maybe you have an opinion to the "vias and current pathes" question
>>>> ???
>>>>
>>>> Herbert
>>>>
>>>>
>>>> Am 23-07-2012 9:14, schrieb Wolfgang.Maichen@xxxxxxxxxxxx:
>>>>> Well, at least as long as it is an ideal, homogeneous transmission line
>>>>> (or at least pretty close to ideal, homogeneous and lossless at the
>>>>> frequency range of interest), and if your "simple multimeter" can measure
>>>>> capacitance and inductance (many better units today can), then
>>>>>
>>>>> - measure total capacitance Ctot between center conductor and shield
>>>>> - measure total inductance Ltot between center conductor and shield, with
>>>>> center conductor and shield shorted together at the far end (then end NOT
>>>>> connected to the multimeter)
>>>>> - calculate the characteristic impedance as Zo = sqrt (Ltot/Ctot)
>>>>>
>>>>> Or if your "simple multimeter" can measure resistance in less than one
>>>>> round trip delay of your cable then you can simply use the Ohmmeter mode
>>>>> and get the result directly. With typical DMMs producing 2-3 reading per
>>>>> second, a cable from here a quarter the distance to the moon is just
>>>>> about sufficiently long for that.
>>>>>
>>>>> Otherwise, you will always measure the termination resistance (inifinite
>>>>> if the cable is open at the end) plus the Ohmic resistance of the cable,
>>>>> not the characteristic impedance.
>>>>>
>>>>> May I now ask what the reason for the question is?
>>>>>
>>>>> Wolfgang
>>>>>
>>>>>
>>>>>
>>>>> -----Original Message-----
>>>>> From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
>>>>> On Behalf Of Havermann, Gert
>>>>> Sent: Monday, July 23, 2012 9:56 AM
>>>>> To: afu@xxxxxxxxxxxxxxxxxx; si-list@xxxxxxxxxxxxx
>>>>> Subject: [SI-LIST] AW: Just a simple question
>>>>>
>>>>> I'd say: first verify that the statement is correct and present the data
>>>>> to proof it , or call it an unproven assumption
>>>>>
>>>>> BR
>>>>> Gert
>>>>>
>>>>>
>>>>> ----------------------------------------
>>>>> Absender ist HARTING Electronics GmbH& Co. KG; Sitz der Gesellschaft:
>>>>> Espelkamp; Registergericht: Bad Oeynhausen; Register-Nr.: HRA 5596;
>>>>> persönlich haftende Gesellschafterin: HARTING Electronics Management
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>>>>> HRB 8808; Geschäftsführer: Edgar-Peter Duening, Torsten Ratzmann, Dr.
>>>>> Alexander Rost
>>>>>
>>>>> -----Ursprüngliche Nachricht-----
>>>>> Von: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
>>>>> Im Auftrag von Herbert
>>>>> Gesendet: Samstag, 21. Juli 2012 16:48
>>>>> An: si-list@xxxxxxxxxxxxx
>>>>> Betreff: [SI-LIST] Just a simple question
>>>>>
>>>>> When I would say that I can measure the impedance of a coaxial cable with
>>>>> a simple multimeter, would you think that I am wrong under all
>>>>> circumstances or would you onle begin your answer with the words :
>>>>> " But only when... " ?!
>>>>>
>>>>> How free is your brain from fixed thinking pathes ?!
>>>>>
>>>>> Herbert
>>>>>
>>>>>
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