Arpad,
The terminals of the ports are much easier to play around with in simulation
than in hardware measurement. That's true. Since your task is to write a
specification that can apply to both measured and simulated S parameters, it is
important to support the slightly limited port definitions of measurements.
Also, since most simulators define the S-parameter circuit blocks with one
terminal per port, the selection of the reference terminal becomes more
important. I think it makes sense to stick with the traditional sense of GND
(or VSS) for the reference terminal. This structure is usually the largest
conductor structure so will be the reference for more other metal structures.
Regards,
Weston
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On ;
Behalf Of Muranyi, Arpad
Sent: Wednesday, November 27, 2019 2:18 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: 3d modelling of high frequency signals with dual
referencing
Weston,
Thanks for your reply. I liked you comment on the DC point!
You are making excellent points, and I agree that there are many different ways
of defining the ports for my hypothetical example. In your first paragraph,
you were discussing the pad side and said "It doesn't even matter which pad you
use.". I agree with that too, in theory. But in practice and from the
perspective of a standardization effort (IBIS), things can get more challenging.
Let's apply your "doesn’t matter" statement to the pin side. The model will
most likely be connected to other S-parameter models at the pin interface, such
as the models of the board interconnects. If I am not mistaken, the general
rule is that when ports are connected to each other from different S-parameter
models, they must have the same reference. What can we (IBIS spec, EDA vendor,
model makers) do to make sure that this requirement is satisfied when the
package and board model may come from different sources using different
extraction tools, etc.?
Thanks,
Arpad
==================================================================
-----Original Message-----
From: Beal, Weston
Sent: Wednesday, November 27, 2019 1:49 PM
To: Muranyi, Arpad <Arpad_Muranyi@xxxxxxxxxx>; si-list@xxxxxxxxxxxxx
Subject: RE: [SI-LIST] Re: 3d modelling of high frequency signals with dual
referencing
Arpad,
S-parameter ports can be confusing, especially because so many tools represent
the port with one terminal. If we simply change the view to have 2 terminals on
every port then the topic is less confusing but more surprising. Looking at
just one end of the configuration in your example, you could use one of the
pads as a reference for the other 2 pads. It doesn't even matter which pad you
use. Or you could use VSS pad for the reference terminal of the signal port and
the signal pad as the reference for the VDD port. At this point it is very
important to connect the block into the circuit in the same way that the ports
were connect to the DUT for measurement or simulation. Another possibility (for
simulation) is to use the universal ground as the reference for 3 ports. Just
make sure you connect the S-parameter block this same way into your circuit.
Make sure you don't short the wrong reference terminals or you will nullify
some portion of the S-parameter block.
One important thing to remember is that the reference terminal does not have to
be the same for all the ports of an S-parameter block. Each port has its own
reference. The connections of the terminals need to be clearly documented for
the S parameters to be useful.
Another complication is the way that your chosen simulation tool represents the
S-parameter ports. If your simulator's circuit definition uses only one
terminal for each port then the reference terminal for all ports is the
"ground" node. Therefore, your S parameters have to be measured or simulated
with the port reference terminals connected to something that represents ground.
Your last statement brings up another issue, behavior at 0Hz. Most S parameters
are not measured or simulated to very low frequency. The simulator has to
extrapolate to DC for transient simulations, and the extrapolation might not go
well. Different tools will reach different extrapolated values because of
different algorithms and assumptions. Maybe part of your standard should define
that [S, Z, Y] parameters need to be correctly specified at 0Hz.
Regards,
Weston
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On ;
Behalf Of Muranyi, Arpad
Sent: Wednesday, November 27, 2019 1:18 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: 3d modelling of high frequency signals with dual
referencing
Hello Everyone,
Now that I see many of our experts participating in this conversation, I would
like to ask a related question, even though it might deviate a little bit from
the original post.
This came up in the conversations in the IBIS Interconnect Task Group when we
were working on the new interconnect modeling syntax for IBIS v7.0 (also known
as BIRD189).
For simplicity, imagine a device with three pins which has a die with three
pads. One for Vdd, one for Vss and one for the signal. Let's say you want to
extract an S-parameter model for the package that goes between the pins and
pads. How many ports is this S-parameter model going to have, and where would
the reference terminal of each port be connected? Assuming a regular CMOS
buffer on the die, keep in mind that the buffer will sometimes put a low
impedance current path between the signal and Vdd and other times between the
signal and Vss, and consequently the currents need to be accounted for properly
for both conditions.
Thanks,
Arpad
====================================================================
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