Hi In message <Pine.LNX.4.62L.0605011501570.28930@xxxxxxxxxxxxxxxxxxxxxxx> John-Mark Bell <jmb202@xxxxxxxxxxxxxxx> wrote: > On Sun, 30 Apr 2006, Dave Higton wrote: > > > The data sheet for the 1535 Southbridge Controller, part 1, PDF p26, > > shows that pad H1 is an input while reset is active. If the pin is > > at logic 1, the configuration register's base address is 3F0; if 0, > > the configuration register's base address is 370. The pin has a 20k > > pull-up resistor. After release of reset, the pin becomes "RTS1J", > > the RTS output for UART port 1. Assuming the simplest circuit, and > > no other pull-down resistors, I'd expect this pin to be at a logic 1 > > during reset, and therefore I'd expect the configuration register's > > base address to be 3F0. Is this what the Iyonix's software assumes? iyo assumes the chip does as expected .. however, if for some reason the attached modem has enough drive to alter the programmed state then the chip will come up with the alternative port addressing scheme. the addressing BTW is the offset from base of io space assigned to that bit of the ALI a quick peek of the code suggests that the 2 serial ports are at 2f8/3f8, i.e. a logic 1 on the "RTS1J" .. however if the modem loads this line low (a 20k r doesn't need much load) then it may perhaps start in the alternate state. more to be checked.. John [snip] -- John Ballance jwb@xxxxxxxxxx