[PCB_FORUM] Re: Total number of pages in a hierarchical design
- From: "Davies, Charles (cdavies)" <cdavies@xxxxxxxxxx>
- To: <icu-pcb-forum@xxxxxxxxxxxxx>
- Date: Mon, 20 Sep 2010 12:59:51 -0700
Yes we do use it. We used it to generate a table of contents and index
symbols. I'm not familiar with the bug you mention. We've been using the file
for many years.
Regards,
Charlie
On Sep 20, 2010, at 12:11 PM, "Khurana, Varun" <vkhurana@xxxxxxxxxxxx> wrote:
> Folks,
>
>
>
> Is there a way to programmatically determine the total number of pages in a
> hierarchical design in Allegro Design Entry HDL v16.3?
>
>
>
> Counting page files in sch_1 folder is not an option since it won't work, if
> the hierarchical symbol is instantiated more than once. Ideas are appreciated.
>
>
>
> Thanks,
>
> Varun
>
>
>
> Qualcomm Inc.
>
> San Diego, CA
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