[atari7800] Re: Paddle controllers??
- From: "Eric Ball" <ek-ball@xxxxxxxxxx>
- To: <atari7800@xxxxxxxxxxxxx>
- Date: Sat, 19 Feb 2005 18:47:51 -0500
> Are we talking about timing problems during video DMA from the maria?
Accessing the TIA will cause the bus access cycle to be extended. But that
should be a problem since we're not cycle counting.
> That's what I was thinking. I re-read the programming doc again and it
> states that no time would be stolen when a DLI occurred. Is this true?
What
> if the DLI lasts too long? Wouldn't this affect the next line?
There's nothing magical about a DLI. MARIA merely asserts NMI one MPU cycle
after it releases HALT at the end of the DLL. When HALT is released, the
6502 starts the NMI by saving the PC & SR on the stack, loading the PC from
the NMI vector and then loading the instructions in the NMI handler. MARIA
then asserts HALT 7 CPU cycles after the start of the line, which stops the
6502 after the current instruction is completed. This happens whether or
not the DLI has been completed. HALT is released when MARIA finishes
loading the display list and the 6502 continues process where it left off.
To quote the 7800 Software Guide: "This interrupt in no way affects DMA, so
processing will still be suspended at the beginning of the next raster."
NMI is edge triggered, and it appears to be considered re-entrant. So if
the DLI handler lasts too long, the next DLI NMI would restart the handler,
potentially overflowing the stack.
It should be noted that STA WSYNC will probably delay the DLI handler until
the start of next line. So if you are using a DLI, then don't use STA WSYNC
in a mainline MSTAT test loop. However, there are times when you will want
to use a STA WSYNC in the DLI handler to delay a MARIA update (especially
when changing a palette entry or CTRL read mode) until the start of the
line.
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