[SI-LIST] Re: source synchronous constraint
- From: "Todd Westerhoff" <twesterh@xxxxxxxxx>
- To: <si-list@xxxxxxxxxxxxx>
- Date: Tue, 27 Aug 2002 13:32:47 -0400
Andy has a very good point. Many source-synchronous devices fire clock
(usually called the strobe output) and the data bits at the same time, and
rely on the PCB to supply the proper offset between signals for the
receiver. I've usually seen the words "edge aligned" to describe the
strobe-data relationship for these parts.
In such a case, it would be common to see the data INvalid window spec'd
with respect to the stobe. I believe Andy is correct, and that is what's
going on here.
Todd.
Todd Westerhoff
Signal Integrity Engineer
Cisco Systems
250 Apollo Drive - Chelmsford, MA - 01824
email:twesterh@xxxxxxxxx
ph: 978-497-0272
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