[SI-LIST] Re: ibis

The model on the Xilinx web page covers all the buffers that are =
available
in the Virtex-4 family.  You need to decide which buffers you are using, =
and
then create your own custom model using the Xilinx supplied data.

Tom Dagostino
Teraspeed(R) Labs
13610 SW Harness Lane
Beaverton, OR 97008
503-430-1065
tom@xxxxxxxxxxxxx=20
www.teraspeed.com=20

Teraspeed Consulting Group LLC
121 North River Drive
Narragansett, RI 02882
401-284-1827

-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] =
On
Behalf Of Hiten Bhagat
Sent: Wednesday, December 20, 2006 10:27 PM
To: abhishek@xxxxxxxxx
Cc: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: ibis


Abhishek,
To convert HSPICE to IBIS, there can be different approaches. You can =
use
ready made scripts (I think North Carolina University scripts are =
popular).
Or you can do HSPICE simulation and print out data points (V-t and V-I) =
as
required by IBIS. You want more points on the curve and few points in =
flat
response portion. IBIS restricts you to 100 data points per curve. So, =
after
simulation (which may spit out more data points depending on precision) =
you
have to remove data points as needed.

regards,
Hiten


On 12/21/06, abhishek@xxxxxxxxx <abhishek@xxxxxxxxx> wrote:
>
> Hi,
> I  am looking for the ibis model of virtex-4 fpga1152 pin. The model=20
> available on Xilinx website is only for 148 pin. Can any one guide me=20
> how to get the models for that.
>
> Moreover they have provided hspice model for Virtex-4. I just got the=20
> information that Hspice models can be converted into ibis.Does anyone=20
> having this experience.
>
>
> Regards,
> Abhishek
>
>
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