[SI-LIST] Re: Timing analysis

Hi Istavan,

Agreed that Greg's book is about chip-to-chip timing analysis and that the 
on-chip timing issue is a whole other ball of wax.

By the way si-lister, I notice that the article that places highest in a Google 
search on signal integrity is the Wikipedia article.
http://en.wikipedia.org/wiki/Signal_integrity

This article appears to have been largely penned by Lou Scheffer and is derived 
from a chapter on on-chip SI in the handbook he edited:

"Electronic Design Automation For Integrated Circuits Handbook, by Lavagno, 
Martin, and Scheffer, ISBN 0-8493-3096-3 A survey of the field of electronic 
design automation. Portions of IC section of this article were derived (with 
permission) from Vol II, Chapter 21, Noise Considerations in Digital ICs, by 
Vinod Kariat."

I was wondering if any expert here was interested in expanding/contributing to 
the article? If so, a good starting point is here:

http://en.wikipedia.org/wiki/Wikipedia:Introduction

Best,
-- Colin
Still looking for feedback at http://signal-integrity-tips.com/feedback/ 



-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On 
Behalf Of Istvan Nagy
Sent: Thursday, May 28, 2009 1:13 PM
To: Jennifer Maharani; si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Timing analysis

hi

i think we deal with timing in 2 a littlebit different aspects :
-on-board interface and interconnect timing. taking every chip as a black 
box. specifying PCB layout length and matching constraints, validating the 
designs.
-on chip logic and interconnect timing, and IO timing seen from the chip. 
Mostly for VLSI/ASIC/FPGA-based on-chip logic design, but also to understand 
board-level timing too.

if you think about it, they are the same thing, but at a littlebit different 
starting points.

Greg Edlunds book is trying to talk about the first one, but I think lots of 
things are missing from that. so, i would suggest to check also the jedec 
79B, 79C, 21C standards, and search for appnotes, from Texas instruments, 
Altera, Micron, Cadence. But for start, Gregs book is quiet good.
About the second one, i would suggest this one: (I just started reading it 
few days ago. its a brand new book) 
http://www.amazon.com/Static-Timing-Analysis-Nanometer-Designs/dp/0387938192/ref=sr_1_1?ie=UTF8&s=books&qid=1241797932&sr=8-1


regards,
Istvan Nagy,
CCT, UK


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