[SI-LIST] Re: Split gnd planes - for/against?
- From: Sol Tatlow <Sol.Tatlow@xxxxxxxxxxxxxxxxxxxx>
- To: "Vivekkumar M-TLS,Chennai" <Vivekkumarm@xxxxxx>
- Date: Wed, 08 Apr 2009 14:25:08 +0200
Vivek, thanks for the link. Actually, it's a good example of exactly
what I am trying to avoid.... looks like another eval board done in
just one way, in otherwise ideal lab conditions, where EMC testing is
something that the engineers involved have never personally had to
deal with. A gross generalisation, perhaps, but maybe true in the
vast majority of such 'app note' cases? At least, real-life product
PCBs don't tend to look as 'perfect' as the example given, thanks
generally to space requirements.
My feeling is, the methods used to improve functional performance
(which may or may not really have a direct effect) frequently have a
negative effect on EMI performance, which, at the end of the day, is
as important as the functional performance. Trouble is, EMI problems
are usually much harder to predict, find or correct: functional
performance can (must) be tested in your own labs, but EMI performance
is typically done externally (at least for smaller companies), with
higher costs and delays involved when something goes wrong.
Another thing: the moating in that app note FORCES the layouter to
place the components and partition the circuitry correctly as a
component part of a complete design, leaving space between groups of
circuitry; theoretically/hopefully, the layouter will also avoid
routing through this area! Based on this, I ask myself whether moats
and isolated grounds are not such an established phenomena at least
partially because they are a way of making sure that layouters, who
don't know what they are doing, don't screw up; that this, and not
the actual moats or isolation itself, is what really counts.
What do you think?
Sol
Vivekkumar M-TLS,Chennai schrieb:
>
> Sol,
>
> Steve is right. There isnt any general thumb rule that we follow with
> respect to gnd splitting.
>
> The following link which i have gone through earlier, details example
> reg. Moating :
>
> http://www.national.com/an/AN/AN-1347.pdf
>
> May be useful for you.
>
> Regards
> Vivek
>
> -----Original Message-----
> From: si-list-bounce@xxxxxxxxxxxxx on behalf of steve weir
> Sent: Tue 4/7/2009 9:41 PM
> To: Sol Tatlow
> Cc: si-list
> Subject: [SI-LIST] Re: Split gnd planes - for/against?
>
> Sol, unfortunately there is not a single answer. In most cases moating
> is a bad idea, particularly if one does not understand the caveats and
> how to deal with them. It's not just the moats: It's the placement,
> clearances, stitching, and routing that all need to be considered.
>
> Steve
>
> Sol Tatlow wrote:
> > I know this subject has been raised before, countless times in one
> > guise or another. I have also googled plenty. I'm not looking for
> > theoretical opinions, either, about whether or not, or when, they
> > should be used (specifically not, "it depends", unless you've got
> > REAL-LIFE examples, for and against!!!).
> >
> > This subject raised its head for me in this case due to using
> > 2 A/Ds as well as 2 D/As, both from Analog Devices, where one
> > specifies a split plane, the other specifies no split. Now, I am
> > all too wary of relying simply on evaluation boards, where, in
> > general, one layout is done, and if it works, that's how everyone
> > should do it (_without_ comparing 2 different approaches).
> >
> > I personally have 3 concrete cases where split gnds had no positive
> > effect on SI, but significantly worsened EMC results (despite
> > sticking to all the usual guidelines, like no tracks over the
> > splits, etc.), but I have no concrete case FOR split ground planes.
> >
> > So, what I'm interested in is: does anyone have CONCRETE examples
> > which they would like to share for/against split planes? The kind
> > of thing I mean would be like in one of the cases I had, where I
> > wanted to go against the suggested approach of using a split gnd,
> > and persuaded my customer to pay for 2 variants of the same board
> > on the same manufacturing panel, one with split ground, one with
> > solid ground. Both variants were assembled and tested, with regards
> > to both SI as well as EMC: both were functionally satisfactory; at
> > EMC testing, however, the split-plane bombed out big time, while
> > the non-split sailed through. I like to think that it wasn't due
> > to any screw-ups on my side, that the split ground failed - I am
> > not a newbie to PCB layouts, and, while for sure no professional
> > expert on all areas of SI, I believe I avoided the typical blunders
> > often present in split ground layouts.
> >
> > Anyway, my customer was more than happy, but not everyone has the
> > money/time/desire to do as I suggested. So, any 'war stories' to
> > support one or the other approach would be appreciated to help
> > expand my knowledge and understanding of this subject - obviously,
> > we all respect confidentiality, so I'm not looking for circuits,
> > layouts and so on, but I figure many of you must have stories that
> > can be related regarding this subject. Or perhaps some good links
> > to non-confidential 'real-life' examples/studies?
> >
> > Regards,
> > Sol
> >
> >
>
>
> --
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