[SI-LIST] Re: Split gnd planes - for/against?
- From: "Aubrey Sparkman" <asparkman@xxxxxxxxxxxxx>
- To: "'Lee Ritchey'" <leeritchey@xxxxxxxxxxxxx>, "'Steve Weir'" <weirsi@xxxxxxxxxx>
- Date: Tue, 7 Apr 2009 18:03:50 -0500
Lee,
Could you explain what's wrong with Steve's test case? I think others have
been able to get lots of mileage with test cases (Like Dr. Howard Johnson
and his via return path mockup) to demonstrate various EM effects.
Aubrey Sparkman
Aubrey.K.Sparkman@xxxxxxxx
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On
Behalf Of Lee Ritchey
Sent: Tuesday, April 07, 2009 4:25 PM
To: Steve Weir
Cc: Charles Grasso; Sol Tatlow; si-list
Subject: [SI-LIST] Re: Split gnd planes - for/against?
Steve,
I'm interested in people claiming that ground plane splits are a good
answer, to show us.
> [Original Message]
> From: steve weir <weirsi@xxxxxxxxxx>
> To: Lee Ritchey <leeritchey@xxxxxxxxxxxxx>
> Cc: Charles Grasso <Charles.Grasso@xxxxxxxxxxxx>; Sol Tatlow
<Sol.Tatlow@xxxxxxxxxxxxxxxxxxxx>; si-list <si-list@xxxxxxxxxxxxx>
> Date: 4/7/2009 1:27:08 PM
> Subject: [SI-LIST] Re: Split gnd planes - for/against?
>
> Lee, if someone has a real case with A/B characterizations that's
> great. If you are just interested in proving the principles the
> simple card I suggested will do.
>
> Best Regards,
>
>
> Steve.
> Lee Ritchey wrote:
> > Steve,
> >
> > Several people responded with claims of real cases. Those are the
> > ones that should be advanced to support the claims made.
> >
> >
> >
> >> [Original Message]
> >> From: steve weir <weirsi@xxxxxxxxxx>
> >> To: <leeritchey@xxxxxxxxxxxxx>
> >> Cc: Charles Grasso <Charles.Grasso@xxxxxxxxxxxx>; Sol Tatlow
> >>
> > <Sol.Tatlow@xxxxxxxxxxxxxxxxxxxx>; si-list <si-list@xxxxxxxxxxxxx>
> >
> >> Date: 4/7/2009 11:59:58 AM
> >> Subject: [SI-LIST] Re: Split gnd planes - for/against?
> >>
> >> Lee, the physics holds up. I'm not in the practice of designing
boards
> >> for my customers that don't work, so I don't have a before and
> >> after
of
> >> a physical assembly to show you. If you question the numbers I
offered,
> >> we can build up a hypothetical case in EDA tools if you would like
> >> to see it.
> >>
> >> But I can give you a Radio Shack experiment to demonstrate it. In
> >> the Radio Shack experiment, we need a power supply and a very
> >> simple
circuit
> >> board.
> >>
> >> Card 1: Two sided Card 2" x 2" 1oz Cu bottom surface solid plane,
> >> top surface signal test points only.
> >> Four test vias from the plane to the top surface TPA 0.25, 0.25 TPB
> >> 0.25, 1.75 TPC 1.75, 0.25 TPD 1.75, 1.75
> >>
> >> Card 2: Same as Card 1, but with 0.025" moat at 1.00, 0.00 to 1.00,
2.00
> >>
> >> Apply current limited supply set to 1A. between 1.5", 0.00 and
> >> 1.5",
2.00
> >> Measure the voltage from TPA to TPB and TPC to TPD
> >>
> >> Card 1, voltage difference from TPC to TPD will be about 380uV,
voltage
> >> difference from TPA to TPB will be a little less.
> >> Card 2, voltage difference from TPC to TPD will be about 750uV,
voltage
> >> difference from TPA to TPB will be virtually zero.
> >>
> >> Now for HF signals a couple of things will happen that are a little
> >> different: First Lenz will confine the crosstalk, so the voltage
ratio
> >> from the signal source to the monitor points will be far less than
> >> the DC case. Second, there will be slight capacitive coupling
> >> across the
> >>
> > split.
> >
> >> So we repeat the experiment, except that this time, we use a VNA to
> >> inject at TPC with a terminator at TPD, and monitor in successive
> >> experiments the insertion loss to TPA and TPB. The difference is
> >> the noise signal. For the split plane case the insertion loss will
> >> be
much
> >> higher than for the single plane case.
> >>
> >> Best Regards,
> >>
> >>
> >> Steve.
> >>
> >> Lee Ritchey wrote:
> >>
> >>> Steve,
> >>>
> >>> You have described a hypothetical case here. I'm looking for a
> >>> real
> >>>
> > one.
> >
> >>> You didn't reply with "you will have to get a case yourself" as
> >>> some
> >>>
> > do.
> >
> >>> Refusing to supply an example to support claims is tantamount to
making
> >>> things up.
> >>>
> >>> If a claimer can't show a case where a rule works, the claim
> >>> should
not
> >>>
> > be
> >
> >>> made.
> >>>
> >>> Lee
> >>>
> >>>
> >>>
> >>>
> >>>> [Original Message]
> >>>> From: steve weir <weirsi@xxxxxxxxxx>
> >>>> To: <leeritchey@xxxxxxxxxxxxx>
> >>>> Cc: Charles Grasso <Charles.Grasso@xxxxxxxxxxxx>; Sol Tatlow
> >>>>
> >>>>
> >>> <Sol.Tatlow@xxxxxxxxxxxxxxxxxxxx>; si-list <si-list@xxxxxxxxxxxxx>
> >>>
> >>>
> >>>> Date: 4/7/2009 11:13:14 AM
> >>>> Subject: Re: [SI-LIST] Re: Split gnd planes - for/against?
> >>>>
> >>>> Lee and this will be true in the majority of cases, and almost
without
> >>>> exception where a board is digital only. For an example of where
> >>>> a split works, and it must be done properly or all bets are off:
> >>>>
> >>>> Circuit region 1, noise sensitivity is in the uV's. Let's assume
> >>>> the power / ground separation is 4 mils. The spreading
> >>>> inductance is roughly 128pH / square. Now assume that there is
> >>>> an adjacent
circuit
> >>>> region that has a 64 bit memory bus on it. Let's assume very
> >>>>
> > pedestrian
> >
> >>>> 200ps rise times on 18mA swing. That bus is switching just over
> >>>> 5E9A/s. If circuit region 1 has a noise limit of 10uV across its
> >>>>
> > length
> >
> >>>> and a square aspect ratio, then we need over 90dB isolation. We
> >>>>
> > aren't
> >
> >>>> going to get there with placement and bypass caps alone. But we
> >>>> can
> >>>>
> > get
> >
> >>>> there by including well designed moating
> >>>>
> >>>> You are absolutely correct that many people put moats in they
> >>>> don't
> >>>>
> > need
> >
> >>>> and worse do so in a way that creates other more serious problems.
> >>>> Moats are sort of like ferrite beads: they are tools that have
> >>>> particular value is specific circumstances. They always come
> >>>> with a price. Their must be justified as needed and appropriate,
> >>>> and once
> >>>>
> > used
> >
> >>>> engineered correctly.
> >>>>
> >>>> Best Regards,
> >>>>
> >>>>
> >>>> Steve.
> >>>> Lee Ritchey wrote:
> >>>>
> >>>>
> >>>>> I've taught my high speed class to more than 7000 engineers and
> >>>>>
> >>>>>
> >>> designers
> >>>
> >>>
> >>>>> over the years. In each class, I ask for examples where
> >>>>> splitting a
> >>>>>
> >>>>>
> >>> ground
> >>>
> >>>
> >>>>> plane actually made a circuit work better with the promise to
> >>>>> add
the
> >>>>> example to my class.
> >>>>>
> >>>>> To date, there have been no examples provided. There has been a
> >>>>> bit
> >>>>>
> > of
> >
> >>>>> hand waving on the topic but no clear examples that can be
defended.
> >>>>>
> >>>>>
> >>> The
> >>>
> >>>
> >>>>> usual reason is "we've done it this way for years and it has
worked."
> >>>>>
> >
> >
> >>>>>
> >>>>>
> >>> To
> >>>
> >>>
> >>>>> me, that sounds an awful lot like the man who jumped off the 20
story
> >>>>> building and reported as he passed the 10th floor, "so far, so
good".
> >>>>> Splitting the ground plane just hasn't shown up as a problem,
> >>>>> not
> >>>>>
> > that
> >
> >>>>>
> >>>>>
> >>> is
> >>>
> >>>
> >>>>> actually fixed anything.
> >>>>>
> >>>>> I have fixed EMI problems several times by removing splits in
> >>>>> ground planes. Some of see this as easy money!
> >>>>>
> >>>>> I'll make the same offer to this group. Show me an example
> >>>>> where
> >>>>>
> >>>>>
> >>> splitting
> >>>
> >>>
> >>>>> ground planes helps and I'll make it a part of my course.
> >>>>>
> >>>>> Lee Ritchey
> >>>>>
> >>>>>
> >>>>>
> >>>>>
> >>>>>
> >>>>>> [Original Message]
> >>>>>> From: Grasso, Charles <Charles.Grasso@xxxxxxxxxxxx>
> >>>>>> To: steve weir <weirsi@xxxxxxxxxx>; Sol Tatlow
> >>>>>>
> >>>>>>
> >>>>>>
> >>>>> <Sol.Tatlow@xxxxxxxxxxxxxxxxxxxx>
> >>>>>
> >>>>>
> >>>>>
> >>>>>> Cc: si-list <si-list@xxxxxxxxxxxxx>
> >>>>>> Date: 4/7/2009 9:57:52 AM
> >>>>>> Subject: [SI-LIST] Re: Split gnd planes - for/against?
> >>>>>>
> >>>>>> We use split planes all the time.
> >>>>>> When you have circuits of *vastl8 different noise floors
co-existing
> >>>>>> on one board - it's the only way to go.
> >>>>>>
> >>>>>> Chas
> >>>>>>
> >>>>>> -----Original Message-----
> >>>>>> From: si-list-bounce@xxxxxxxxxxxxx
> >>>>>>
> >>>>>>
> >>> [mailto:si-list-bounce@xxxxxxxxxxxxx]
> >>>
> >>>
> >>>>>> On Behalf Of steve weir
> >>>>>> Sent: Tuesday, April 07, 2009 10:11 AM
> >>>>>> To: Sol Tatlow
> >>>>>> Cc: si-list
> >>>>>> Subject: [SI-LIST] Re: Split gnd planes - for/against?
> >>>>>>
> >>>>>> Sol, unfortunately there is not a single answer. In most cases
> >>>>>>
> >>>>>>
> >>> moating
> >>>
> >>>
> >>>>>> is a bad idea, particularly if one does not understand the
> >>>>>> caveats
> >>>>>>
> > and
> >
> >>>>>> how to deal with them. It's not just the moats: It's the
> >>>>>>
> > placement,
> >
> >>>>>> clearances, stitching, and routing that all need to be considered.
> >>>>>>
> >>>>>> Steve
> >>>>>>
> >>>>>> Sol Tatlow wrote:
> >>>>>>
> >>>>>>
> >>>>>>
> >>>>>>> I know this subject has been raised before, countless times in
> >>>>>>> one guise or another. I have also googled plenty. I'm not
> >>>>>>> looking for theoretical opinions, either, about whether or
> >>>>>>> not, or when, they should be used (specifically not, "it
> >>>>>>> depends", unless you've got REAL-LIFE examples, for and
against!!!).
> >>>>>>>
> >>>>>>> This subject raised its head for me in this case due to using
> >>>>>>> 2 A/Ds as well as 2 D/As, both from Analog Devices, where one
> >>>>>>> specifies a split plane, the other specifies no split. Now, I
> >>>>>>> am all too wary of relying simply on evaluation boards, where,
> >>>>>>> in general, one layout is done, and if it works, that's how
> >>>>>>> everyone should do it (_without_ comparing 2 different
approaches).
> >>>>>>>
> >>>>>>> I personally have 3 concrete cases where split gnds had no
positive
> >>>>>>> effect on SI, but significantly worsened EMC results (despite
> >>>>>>> sticking to all the usual guidelines, like no tracks over the
> >>>>>>> splits, etc.), but I have no concrete case FOR split ground
planes.
> >>>>>>>
> >>>>>>> So, what I'm interested in is: does anyone have CONCRETE
> >>>>>>> examples which they would like to share for/against split
> >>>>>>> planes? The kind of thing I mean would be like in one of the
> >>>>>>> cases I had, where I wanted to go against the suggested
> >>>>>>> approach of using a split gnd, and persuaded my customer to
> >>>>>>> pay for 2 variants of the same board on the same manufacturing
> >>>>>>> panel, one with split ground, one with solid ground. Both
> >>>>>>> variants were assembled and tested, with
regards
> >>>>>>> to both SI as well as EMC: both were functionally
> >>>>>>> satisfactory; at EMC testing, however, the split-plane bombed
> >>>>>>> out big time, while the non-split sailed through. I like to
> >>>>>>> think that it wasn't due to any screw-ups on my side, that the
> >>>>>>> split ground failed - I am not a newbie to PCB layouts, and,
> >>>>>>> while for sure no professional expert on all areas of SI, I
> >>>>>>> believe I avoided the typical
blunders
> >>>>>>> often present in split ground layouts.
> >>>>>>>
> >>>>>>> Anyway, my customer was more than happy, but not everyone has
> >>>>>>> the money/time/desire to do as I suggested. So, any 'war
> >>>>>>> stories' to support one or the other approach would be
> >>>>>>> appreciated to help expand my knowledge and understanding of
> >>>>>>> this subject - obviously, we all respect confidentiality, so
> >>>>>>> I'm not looking for circuits, layouts and so on, but I figure
> >>>>>>> many of you must have stories that can be related regarding
> >>>>>>> this subject. Or perhaps some good links to non-confidential
'real-life' examples/studies?
> >>>>>>>
> >>>>>>> Regards,
> >>>>>>> Sol
> >>>>>>>
> >>>>>>>
> >>>>>>>
> >>>>>>>
> >>>>>>>
> >>>>>> --
> >>>>>> Steve Weir
> >>>>>> Teraspeed Consulting Group LLC
> >>>>>> 121 North River Drive
> >>>>>> Narragansett, RI 02882
> >>>>>>
> >>>>>> California office
> >>>>>> (866) 675-4630 Business
> >>>>>> (707) 780-1951 Fax
> >>>>>>
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> >>>>>> (401) 284-1827 Business
> >>>>>> (401) 284-1840 Fax
> >>>>>>
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> >>>>>> (503) 430-1065 Business
> >>>>>> (503) 430-1285 Fax
> >>>>>>
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> >>>>>> This e-mail contains proprietary and confidential intellectual
> >>>>>>
> > property
> >
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> >>>>>>
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> >>>>>
> >>>> --
> >>>> Steve Weir
> >>>> Teraspeed Consulting Group LLC
> >>>> 121 North River Drive
> >>>> Narragansett, RI 02882
> >>>>
> >>>> California office
> >>>> (866) 675-4630 Business
> >>>> (707) 780-1951 Fax
> >>>>
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> >>>> (401) 284-1827 Business
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> >>>>
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> >>>> This e-mail contains proprietary and confidential intellectual
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> >>>>
> >>>>
> >>> of Teraspeed Consulting Group LLC
> >>>
> >>>
> >>>
> >
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> >>>
> >>>
> >>>
> >> --
> >> Steve Weir
> >> Teraspeed Consulting Group LLC
> >> 121 North River Drive
> >> Narragansett, RI 02882
> >>
> >> California office
> >> (866) 675-4630 Business
> >> (707) 780-1951 Fax
> >>
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> >> (401) 284-1827 Business
> >> (401) 284-1840 Fax
> >>
> >> Oregon office
> >> (503) 430-1065 Business
> >> (503) 430-1285 Fax
> >>
> >> http://www.teraspeed.com
> >> This e-mail contains proprietary and confidential intellectual
> >> property
> >>
> > of Teraspeed Consulting Group LLC
> >
> >
----------------------------------------------------------------------------
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> >>
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> --
> Steve Weir
> Teraspeed Consulting Group LLC
> 121 North River Drive
> Narragansett, RI 02882
>
> California office
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> (707) 780-1951 Fax
>
> Main office
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