[SI-LIST] Re: Single ended Noise OR Differential Noise
- From: steve weir <weirsi@xxxxxxxxxx>
- To: Naresh Dhamija <naresh.dhamija@xxxxxxxxxxxxx>, si-list@xxxxxxxxxxxxx
- Date: Tue, 07 Oct 2014 23:38:52 -0700
The reason that the noise inducing jitter never goes away completely is
because:
1) The receiver reference input never couples perfectly to the return
reference.
2) The receiver input amplifier has its own internal noise. (One might
lump that noise in with the return coupling in the model.)
3) The receive input amplifier has a finite common mode rejection.
4) The receive input amplifier has finite power supply rejection and
power bypass is never perfect.
The signal rides on top of its return. In a perfect world where we
would have amplifiers with infinite common mode rejection and infinite
power supply rejection and the return were coupled perfectly to the
receiver reference then the only remaining noise source that would be
left (for a signal with a single return end to end) would be the noise
of the receive input amplifier. Noise across the power rails would not
matter. But we don't have those things, so noise across the power rails
does matter. Things only get worse when we traverse cavities.
Steve
On 10/7/2014 11:27 PM, Naresh Dhamija wrote:
> Steve.
>
> You are right, I saw that Noise and Jitter on output of IO gets minimized
> when I see the output of IO w.r.t same noisy reference vss. But it only gets
> minimized but not completely gone. Is it because of the finite routing
> delays of vddio,vss and signal within the IO and also signal delay is not
> the same as the supply delays. Is my understanding correct.
>
> Naresh
>
> -----Original Message-----
> From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On
> Behalf Of steve weir
> Sent: Wednesday, October 08, 2014 12:45 AM
> To: si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] Re: Single ended Noise OR Differential Noise
>
> All voltage noise between a single-ended transmitter and receiver causes
> jitter. Single ended jitter is minimized by: Launching against a single
> reference, propagating the transmit energy against that same reference, and
> tightly coupling the receiver threshold voltage to that same reference.
>
> Steve.
>
> On 10/7/2014 6:10 AM, Naresh Dhamija wrote:
>> Hi folks,
>>
>> I am doing power noise analysis on a system that uses SSTL IO buffers.
>> I am seeing the ripple on the IO output signal - such that during hi
>> state IO output signal follows the noise whatever is on the vddio and
>> during low state, IO output signal follows the noise on the vss.
>> Observing this phenomenon, I purposely forced IN PHASE single ended
>> noise to both vdddio and vss of almost the same frequency as of data
>> rate but uncorrelated with data rate. Since noise forced to vddio and
>> vss are IN PHASE so Differential Noise measured between vddio and vss
>> at each instant shows zero noise. But still I see jitter on the edges
>> because of finite rise and fall times, the initial low level and final
>> high level for a transition from low to hi are not always same. Does
>> this mean that along with differential noise, single ended noise on
>> power and ground also cause jitter to IO driver.
>>
>> Regards
>> Naresh
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>
> --
> Steve Weir
> IPBLOX, LLC
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> Reno, NV 89523-9998
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--
Steve Weir
IPBLOX, LLC
1580 Grand Point Way
MS 34689
Reno, NV 89523-9998
www.ipblox.com
(775) 299-4236 Business
(866) 675-4630 Toll-free
(707) 780-1951 Fax
All contents Copyright (c)2013 IPBLOX, LLC. All Rights Reserved.
This e-mail may contain confidential material.
If you are not the intended recipient, please destroy all records
and notify the sender.
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To unsubscribe from si-list:
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