[SI-LIST] Re: SDRAM data bus SI problem

If you are seeing the ringing (glitch) at the package pin, check what it
looks like at the die pad, if it's accessible in your simulation.

Also take a look at the package model for the SDRAM controller (the load
device).  If it has a lot of inductance, you may get a glitch in the
waveform at the IC pin, which is difficult to eliminate.  But the waveform
at the IC die pad may be clean.

A small bit of capacitance at the load pin *might* reduce/eliminate the
ringing, but might have undesirable results.

Regards,
Andy

> I encountered SDR SDRAM data bus SI problem. From the simulation, I see a
> serious ring during rising edge when source is SDRAM and the destination
> is
> SDRAM controller(point to point).  The ring cause the data error in memroy
> R/W operation.


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