[SI-LIST] Re: On-chip Terminations
- From: "Jon Keeble" <jkeeble@xxxxxxxxxxxx>
- To: <si-list@xxxxxxxxxxxxx>
- Date: Tue, 17 Jul 2001 23:50:31 +1000
In this FPGA family, the onchip resistor value for each 'bank' of IO pins is
set, and can be adjusted, by two external resistors Rref (can be different,
but the data book is a bit mysterious about this)
Track Zo varies with process and materials, as previously noted on this
list, by say +-15% unless controlled.
On such a PCB, 5% resistors aren't much worse than 1%.
Regardless of the actual onchip R achieved with particular Rref, having a
means of *adjusting* a group of Rs seems like a valuable thing to me. In
this case *matching* would be more important than absolute value (no spec
for this either).
I suppose a dummy track into the FPGA, and a TDR, could be used to automate
the adjustment process.
*****
I remember reading about a chip a few years ago that used a ring oscillator
and counter to adjust the number of transistors in an output driver that
turned on (as a means of controlling drive impedance). There was supposed to
be a strong correlation between speed of the chip and drive strength.
Jon Keeble
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