[SI-LIST] Re: On choosing center tap capacitor value for differential termination

i recommend looking at Howard johnsons website
http://www.sigcon.com . He has an excellent 
explaination of the centertapped cap for
differential terminations

-----Original Message-----
From: john lipsius
To: si-list@xxxxxxxxxxxxx
Sent: 10/1/2003 5:55 PM
Subject: [SI-LIST] Re: On choosing center tap capacitor value for
differential termination

Regarding Michael's reply, I have just a couple notes- for what it's 
worth.  
NOTE: If the common mode signal is significant then input termination 
won't necessarily solve a resultant BER or EMC problem; it just zeros
the ISI by preventing multiple reflections.  On the other hand, the
source 
termination will attenuate the reflections and the cm noise everywhere 
on the line for better emc. 



0. A .1 or .01 uF cap should be fine.  The time constant is long wrt 
    the rise time and the ceramic ones have generally lower ESR for 
    a wider band than smaller cap values. 

1. If dc bias is required, for ECL driver as an example, care should be 
   taken to include bias current consideration in the Reven choice.  
   The 70 ohm Reven would heavily load such a driver, increasing 
   dc pwr dissipation.  Two 50 ohm resistors, with a center Rt to 
   gnd for dc bias of ECL, is a compact solution.   A center cap to 
   gnd adds common mode noise filtering.  A series termination like 
   22 to 33 ohms is chosen near the source to handle a low level 
   of common mode noise reflections, if anticipated from simulation. 

   Also, too high an Reven could place one driver close to cutoff 
   when low, generating a higher common mode signal. 
   Motorola or Onsemi appnotes discuss this.  

2. Vtt provision by using a R divider influences choice of Reven.    
  

For simpler physical layout, a source series termination is used for 
common mode signal termination if timing budget and attenuation 
aren't significant factors. 
 Less passive components at the recvr also lessens the very high 
frequency mode conversions (diff to common & vice versa) simply 
because there are less vias and less parasitics.  


For the case of different xmt & recv Vio supplies the Rseries is even 
part of a simplified dc bias, Vtt, and Vcm implementation if those are 
important. 
See this link for an example 5V - 3.3V interconnect: 
http://www.cypress.com/cfuploads/support/app_notes/sst33.pdf




----- Original Message ----- 
From: Tom Cipollone 
To: si-list@xxxxxxxxxxxxx 
Sent: Wednesday, October 01, 2003 1:21 PM
Subject: [SI-LIST] Re: On choosing center tap capacitor value for
differential termination


Michael,

Thank you very much for the post.

I would like to view the articles that you referenced but I was not 
able to find them archived at the PC Design Magazine website. They 
only go back as far as 2002. I go to libraries for IEEE journals and 
such but if you know of somewhere that I can get these articles at 
the "click of a mouse" I would be most appreiciative.

Also, just so that you know, there are a number of printed 
characters in your post that I am sure are unintentional. These are 
the "=3D"s and "=20"s. 

Thank You 
Tom Cipollone




--- In si-list@xxxxxxxxxxxxxxx, "Mirmak, Michael" 
<michael.mirmak@xxxx> wrote:
> Tom,
> 
> Thanks for your message.  Before even getting to the issue of 
capacitor=20
> selection, I would advise caution in assuming that two resistors
> connected=20
> to a common node optimally terminate both common mode and 
differential
> mode=20
> signals.
> 
> As pointed out in several places (including PC Design magazine 
articles
> in
> March of '99 and August of '98), a two-resistor solution may 
terminate a
> 
> coupled trace pair well in differential mode but will likely
> misterminate=20
> in the common mode.  For example, imagine a two-trace system with 
an
> impedance=20
> matrix as follows:
> 
> Z =3D | 60 10 |
>     | 10 60 |
> 
> Here Z11 =3D Z22 =3D 60 ohms; Z12 =3D Z21 =3D 10 ohms
> Zdiff    =3D 2*Zodd    =3D 2*(Z11 - Z12)   =3D 100 ohms
> Zcommon  =3D 0.5*Zeven =3D 0.5*(Z11 + Z12) =3D 35 ohms
> 
> In this case, if you terminate this system with two 50 ohm 
resistors=20
> (one per line) connected to a common node, you will terminate
> differential=20
> mode signals to 100 ohms.  However, common mode signals will see a
> mismatch=20
> -- the termination will be 50 ohms rather than 70 ohms per line 
(35 ohms
> 
> Rcommon is generated by a system with each line terminated to 70 
ohms --
> 
> they add in parallel).  For real systems, you could see mode 
conversion=20
> issues because of this mismatch.
> 
> A PI termination would terminate in both modes and avoid mode 
conversion
> 
> issues.  In this case, each line would be terminated with a 70 ohm
> resistor. =20
> In addition, a third resistor would be placed across/between the
> endpoint=20
> nodes.  The parallel sum of the resistors should be equivalent to 
100
> ohms=20
> to terminate the differential mode signals.  Specifically,
> 
> Rdiff =3D 100 =3D (2*Reven) || X where X is the third resistor
> 2*Reven =3D 140 ohms
> X =3D 350
> 
> So, with a 350 ohm resistor across the endpoint nodes and two 70 
ohm=20
> resistors connected to a common node, the example system should 
be=20
> terminated correctly in all modes. =20
> 
> Having said all that, you are correct that a capacitor at the 
common
> node=20
> should be selected to act an AC terminator to common mode 
signals.  As=20
> an off-the-cuff answer, I believe the capacitance value should be
> equivalent=20
> to twice the cap values required to terminate each line in the 
common
> mode. =20
> The value should be selected based on your interface frequency,
> bandwidth, etc.
> 
> I hope this helps!
> 
> - Michael Mirmak
>   Intel Corporation
> 
> 
> -----Original Message-----
> From: si-list-bounce@xxxx [mailto:si-list-bounce@xxxx]
> On Behalf Of Tom Cipollone
> Sent: Wednesday, October 01, 2003 9:00 AM
> To: si-list@xxxx
> Subject: [SI-LIST] On choosing center tap capacitor value for
> differential termination
> 
> 
> Hi,
> 
> I am trying to find some guidelines concerning choosing the=20
> capacitor that is the center tap of two series resistors that form 
a=20
> differential termination. If my information is correct, the=20
> combination either of the resistors and the center tap 
capacitor,=20
> forms an AC common mode termination.=20
> 
> Is there a difference between choosing a center tap capacitor 
used=20
> in this way and choosing a capacitor for an AC termination?
> 
> This inquiry is directed towards the reduction of radiated=20
> emissions. The signals in questions have a rise time of about a=20
> nanosecond.
> 
> Thank You
> Tom Cipollone
> 
> 
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