[SI-LIST] Re: LVDS center tap capacitor termination
- From: Zhangkun <zhang_kun@xxxxxxxxxx>
- To: venubabu@xxxxxxxxx, si-list@xxxxxxxxxxxxx
- Date: Mon, 30 Aug 2004 19:27:00 +0800
Venu
The center cap is for AC common-match. When the differential line is not of
perfect balance, it is very useful.
Best Regards
Zhangkun
2004.8.30
----- Original Message -----
From: "Ummalaneni, Venu Babu (Venu)" <venubabu@xxxxxxxxx>
To: <si-list@xxxxxxxxxxxxx>
Sent: Monday, August 30, 2004 6:04 PM
Subject: [SI-LIST] LVDS center tap capacitor termination
> Hi=20
>
> This query is regarding termination schemes at the LVDS receiver inputs.
>
> Can some one explain me the difference between a 'single resistor
> termination' and 'the two resistors with center tap capacitor' ?
>
> I read some where that the 'center tap capacitor scheme' filter's the
> common mode noise. My doubt is that even in 'single resistor scheme'
> also if we run the differential traces verly closely the common mode
> noise pick-up by the two traces is equal and the Receiver can reject
> this common mode part, right? So why we need to go for center tap
> capacitor scheme? It unnecessarily increase the component count on the
> board, right?
>
> Any inputs are appreciated.
>
> Best regards
> Venu Babu.
>
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