[SI-LIST] Re: LVDS center tap capacitor termination

Steve,

>Now, if we couple the lines tightly, then we would want to add a fourth

>resistor in place of the original 100 ohms to match the line to line=20
>coupling.  This would be something like 500 to 1000 ohms.

What is this fourth resistor? I mean, what are the other three
resistors?

Best regards,
Venu Babu.



-----Original Message-----
From: steve weir [mailto:weirsp@xxxxxxxxxx]=20
Sent: Monday, August 30, 2004 5:03 PM
To: shekhar sharma; Ummalaneni, Venu Babu (Venu); si-list@xxxxxxxxxxxxx
Subject: Re: [SI-LIST] Re: LVDS center tap capacitor termination


No, that isn't right.  Take the view Lee likes to emphasize, and that is
at=20
the driver, we have two single ended signals that are coded as
complements=20
with low skew.  If we do not couple these lines significantly, and blast

them down a Tx line, then we need to terminate each line into the=20
single-ended impedance of 50 ohms.  But 50 ohms needs to be to a Vtt
that=20
is at the center of the swing.  The capacitor does that.

Now, if we couple the lines tightly, then we would want to add a fourth=20
resistor in place of the original 100 ohms to match the line to line=20
coupling.  This would be something like 500 to 1000 ohms.

Steve.
At 12:04 PM 8/30/2004 +0100, shekhar sharma wrote:
>Steve,
>
>Thanks for correction. Some mixing....
>Anyway, I think, this termination terminates the even
>mode (AC termination) upto some extent, coz the the
>resistance values are 50 ohm each with their common
>point connected to a capacitor. Diff pair with 100 ohm
>diff impedance will have common mode impedance more
>than 50 ohm.
>
>
>  --- steve weir <weirsp@xxxxxxxxxx> wrote:
> > You are right that it terminates both modes.  You
> > just have the modes
> > confused.  Even is the common mode, odd is the diff.
> > mode.  The AC
> > termination is to the even mode.
> >
> > Steve.
> > At 11:37 AM 8/30/2004 +0100, shekhar sharma wrote:
> > >Two resistor with centre tap capacitor termination provides AC=20
> > >termination to odd-mode impedance which terminates common mode=20
> > >signal. May I right ???
> > >
> > >Shekh
> > >
> > >
> > >  --- steve weir <weirsp@xxxxxxxxxx> wrote:
> > > > The two resistor termination is a double
> > > > single-ended termination.  The
> > > > single resistor termination presumes a virtual
> > > > ground at the center of the
> > > > resistor.
> > > >
> > > > What noise sources do you think LVDS is trying
> > to
> > > > reject?
> > > > What noise sources do you think LVDS can reject?
> > > > What noise sources do you think LVDS cannot
> > reject?
> > > >
> > > > Steve.
> > > > At 03:34 PM 8/30/2004 +0530, Ummalaneni, Venu
> > Babu
> > > > (Venu) wrote:
> > > > >Hi=3D20
> > > > >
> > > > >This query is regarding termination schemes at
> > the
> > > > LVDS receiver inputs.
> > > > >
> > > > >Can some one explain me the difference between
> > a
> > > > 'single resistor
> > > > >termination' and 'the two resistors with center
> > tap
> > > > capacitor' ?
> > > > >
> > > > >I read some where that the 'center tap
> > capacitor
> > > > scheme' filter's  the
> > > > >common mode noise. My doubt is that even in
> > 'single
> > > > resistor scheme'
> > > > >also if we run the differential traces verly
> > > > closely the common mode
> > > > >noise pick-up by the two traces is equal and
> > the
> > > > Receiver can reject
> > > > >this common mode part, right? So why we need to
> > go
> > > > for center tap
> > > > >capacitor scheme? It unnecessarily increase the
> > > > component count on the
> > > > >board, right?
> > > > >
> > > > >Any inputs are appreciated.
> > > > >
> > > > >Best regards
> > > > >Venu Babu.
> > > > >
> > > >
> > >
> >
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