[SI-LIST] Re: Interconnect Simulations-V2
- From: "Ingraham, Andrew" <a.ingraham@xxxxxxxx>
- To: <si-list@xxxxxxxxxxxxx>
- Date: Tue, 20 May 2003 11:30:45 -0400
There is no relationship whatsoever between the rise time and the frequency
(or period) of something like a clock signal. You could have a 0.001 Hertz
signal with 1 ps rise times.
The relationship Trise = 0.35 / Fc (or Fc = 0.35 / Trise) is an estimate of
the rise time in the case of a moderately well controlled system response
whose -3 dB rolloff frequency is Fc. (That is, if you send an ideal signal
with Trise = 0 ps through a linear system whose -3 dB point is Fc, the
output signal's Trise can be estimated by this formula.) Or conversely, if
you require a certain Trise through an amplifier or other system, you know
what its -3 dB minimum bandwidth should be.
But all digital signals contain significant harmonics beyond the -3 dB
point. So Fc does not define some sort of highest frequency present.
The rise times you get out of a driver circuit, depend on the circuit design
and technology of the driver circuit, not what you want to use it for.
Regards,
Andy
> Do you know if there is a formula which gives you the
> rise time for a specific frequency ?
>
> I found in a book ("Interconnect Analysis and
> Synthesis") a formula which gives you the relation
> between the rise time and the Significant Frequency in
> which you should do the R,L extraction. It is =>
> Sign.Freq=0.34/trise.
>
> Do you think that is this correct to calcullate the
> rise time from this formula ?
>
> From you rexperience do you think that SoC buses can
> work in such high frequencies like 1GHz ?
>
> I am reading a lot of publications about crosstalk in
> high speed interconnects and i' ve seen a lot of guys
> talking about frequencies up to 100GHz !!!!
>
> Do you think that this is reasonable ?
>
> Is finally inductance an important parameter in high
> speed digital buses in SoC ?
>
> Matheos
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- References:
- [SI-LIST] Interconnect Simulations-V2
- From: manthos labropoulos
Other related posts:
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- » [SI-LIST] Re: Interconnect Simulations-V2
- » [SI-LIST] Re: Interconnect Simulations-V2
- » [SI-LIST] Re: Interconnect Simulations-V2
- » [SI-LIST] Re: Interconnect Simulations-V2
- [SI-LIST] Interconnect Simulations-V2
- From: manthos labropoulos