[SI-LIST] Re: How to test the power ripple ?
- From: steve weir <weirsi@xxxxxxxxxx>
- To: icer world <icermail@xxxxxxxxx>
- Date: Mon, 19 May 2008 01:21:16 -0700
Note, should have said:
From a power delivery standpoint only, you care about PDN noise up to
about 2-3X the cut-off frequency of any given IC package as mounted on your
PCB.
steve weir wrote:
> Whoever is saying such things, hasn't been saying them to me. I think
> you should pose your question to them.
>
> If your concern is noise transmission through the PDN, this varies
> substantially depending on where you look and what excites the PDN.
> From a power delivery standpoint only, you care about PDN noise up to
> the cut-off frequency of any given IC package as mounted on your PCB.
> This can be as low as a couple of MHz, or as high as hundreds of MHz
> depending on the power supply and IC of interest. A core logic power
> connection may well be oblivous to anything above 10 or 20MHz, while I/O
> can be sensitive to 100's of MHz. It all depends on the specifics of
> the IC.
>
> Many power supply manufacturers specify noise and ripple as measured
> through a 20MHz single pole LPF. It's convenient for them, but as
> Istvan Novak has pointed-out, allows some really ugly supply outputs to
> advertise much cleaner looking specifications. If this is a concern,
> and you are not in a position to extract / impose a wideband
> specification from your suppliers then you can either: periodically test
> and qualify incoming product, or incorporate a 20MHz LPF into your
> design. The former approach has the disadvantage of what to do with the
> nonconforming supplies. As far as the vendor is concerned the supplies
> work to spec and they have no reason to take them back. You also have
> to worry about what you are going to use to get product out the door.
>
> The latter approach has the advantage that you can rely on the
> manufacturer specs as-is. Often this filter function can be realized
> with a single low inductance capacitor like an X2Y(r) mounted close to
> the power supply connection to the PCB, and attention to local etch. A
> further advantage of this type of approach is that the filter is
> bidirectional. The filter attenuates high frequency load noise feeding
> through back to the power supply input where in many cases it is a
> potential EMC issue.
>
> Steve
>
> icer world wrote:
>
>> hello all:
>> When test the ripple of the power of a board ,It's said that I should test
>> it below 20MHz.But I found that it's much defferent when I test the ripple
>> in the full band width frequency.As I think we should test the ripple
>> without any frequency limit ,or we can't observe the noise produced by other
>> devices which can couple into the power system .I hope someone will give me
>> some !advice,thanks
>>
>>
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>
>
>
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- References:
- [SI-LIST] How to test the power ripple ?
- From: icer world
- [SI-LIST] Re: How to test the power ripple ?
- From: steve weir
Other related posts:
- » [SI-LIST] How to test the power ripple ?
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- » [SI-LIST] Re: How to test the power ripple ?
- » [SI-LIST] Re: How to test the power ripple ?
- [SI-LIST] How to test the power ripple ?
- From: icer world
- [SI-LIST] Re: How to test the power ripple ?
- From: steve weir