[SI-LIST] Re: Determining timing budgets using IBIS

  • From: "Ingraham, Andrew" <Andrew.Ingraham@xxxxxx>
  • To: <alexh1@xxxxxxxxxxxxx>
  • Date: Mon, 29 Jul 2002 08:59:16 -0400

Also note that this is no different when you have SPICE models.

I have never seen a SPICE model for an ASIC output buffer that includes
everything from the clock on out.  Even with older MSI ICs, often their
SPICE models modeled the input receivers or output buffers only, and not
the guts on the chip.  You couldn't use them for clock-to-out timing
measurements.

Andy



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