[SI-LIST] Determining timing budgets using IBIS

Using an IBIS model, I would like to determine the time it takes for the 
voltage at the end of a transmission line to reach Vihmin from a clocked 
output. As I understand it, IBIS output is not referenced from a clock output 
and does not include chip delays. 

If this is correct, is it possible to load the IBIS model with the load as 
specified in the device data sheet (usually a 50pf lumped load or infinitely 
long transmission line), and add a delay to the output of the model such that 
the time to reach the specified output voltage matches the data sheet? 
Then this delay can be used with the IBIS model and the transmission line of 
interest to determine settling time.

If IBIS cannot be used to determine clock to settling time, then it seems it's 
only useful for designing transmission lines and not timing analysis. 



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