[SI-LIST] Re: DDR1 without VTT termination

  • From: <ravi.potana@xxxxxxxxx>
  • To: <k.kathir@xxxxxxxxx>, <si-list@xxxxxxxxxxxxx>
  • Date: Tue, 1 Apr 2008 08:50:27 +0530

Hello Kathir,

Please refer to appnote
http://download.micron.com/pdf/technotes/DDR/tn4614.pdf from Micron.
This may give you some help.

Some system designs can operate without requiring VTT. The approximate
system
boundaries enabling VTT exclusion are:
* Two or fewer DDR components in the system
* Moderate current draw
* Trace length <2in (5cm)
* SI and drive strengths within data sheet limits (determined through
simulation)

Regards
Ravi


-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of Kathiresan K
Sent: Monday, March 31, 2008 7:48 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] DDR1 without VTT termination

Hi,
I need to have a single chip DDR1 (160 MHz, 16-Bit) memory for a
processor.
I don't want to provide VTT terminations. I'll keep the trace length as
minimum as possible. I may provide series termination but I haven't done
pre-layout simulation yet.
Can somebody please clarify whether it can be designed without VTT
termination? If yes, what can be the maximum trace length I go for? If
I'm providing series termination, should I provide at both the ends for
bi-directional signals?

Regards,
Kathir


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