Hi, I need to have a single chip DDR1 (160 MHz, 16-Bit) memory for a processor. I don't want to provide VTT terminations. I'll keep the trace length as minimum as possible. I may provide series termination but I haven't done pre-layout simulation yet. Can somebody please clarify whether it can be designed without VTT termination? If yes, what can be the maximum trace length I go for? If I'm providing series termination, should I provide at both the ends for bi-directional signals? Regards, Kathir ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List technical documents are available at: http://www.si-list.net List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu