[SI-LIST] Re: DDR interface

Hi,
I am also looking for the same informations. where can i get the standard
guidelines for DDR-SDRAM layout. I am using multiple DDR-SDRAM chips to form
a DDR-bank on board.


Thanks,
Sanjay

-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of zheng qi
Sent: Wednesday, September 27, 2006 8:09 AM
To: AlexLi@xxxxxxxxxxxx
Cc: Edi.Fraiman@xxxxxxxxxx; si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: DDR interface


hi

I think ck and dqs belong to different clock domin
.so match them does really meaningful ???



2006/9/27, Alex Li <AlexLi@xxxxxxxxxxxx>:
> Hi, Edi:
>       On DDR layout, you can routing DQS/DQ(DM)/Clock with same lengrh.
>      =20
>       On DDR2 layout, you can routing DQS and Clock with same length.
>       But data and data mask must be shorter than DQS
>      =20
> B.R.
> Alex Li
>
> -----Original Message-----
> From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
> On Behalf Of Fraiman, Edi
> Sent: Tuesday, September 26, 2006 9:50 PM
> To: si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] DDR interface
>
> Hi all,
>
> I have question about DDR interface layout.
> I understand that during PCB layout the DQS (data strobe) should be
> routed with same length as DQ (data), DQM signals and
> Address bus and control signals (RAS,CAS, CKE,WE,CS) should be aligned
> to clock.
> But I do not understand what relationship (what the maximum difference
> in length) between  DQS and CLOCK.
> Could you please advise?
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