[SI-LIST] Re: DDR Vref Bypassing

Bill,
If Vref is designed to only track low frequency variations of the driver 
VDDQ (a capacitor only between Vref and ground), then the phase 
difference of the noise voltage arriving at the Vref and signal pins is 
insignificant. An AC divider approach that tracks all frequencies, seems 
beneficial only if the design can ensure that the phase of the noise 
voltage arriving at every signal pin matches that of Vref. If such 
matching is not achieved, the single capacitor design would perform better.

Thanks,
Vinu


Bill Wurst wrote:

>Chris,
>
>The answer to your question lies in understanding the function of the 
>Vref line.  DDR, as well as DDR2, utilize differential receivers to 
>process single-ended inputs that have been generated by drivers which 
>swing in a balanced fashion around the mid-point of the VDD/GND system. 
>  To properly process these single-ended inputs, the inverting input of 
>each differential receiver is connected to Vref.  The receivers will 
>work best when Vref equals exactly 0.5*(VDD-GND), including any noise 
>that is present on the VDD/GND system.  The purpose of placing an equal 
>amount of capacitance from Vref to VDD and from Vref to GND is to form 
>an ac divider that keeps Vref equal to 0.5*(VDD-GND) over all 
>frequencies.  The capacitance should be large enough to swamp out any 
>parasitic capacitance that exists which could imbalance Vref.
>
>I'll have to hedge on the second question which was "whether an x2y 
>capacitor is better than two discrete capacitors" since I don't know 
>enough about x2y devices.  Properly configured, an x2y capacitor could 
>perform better, but the bottom line comes down to the accuracy of the ac 
>divider.
>
>Regards,
>
>     -Bill
>
>
>       /************************************
>      /         billw@xxxxxxxxxxx         /
>     /                                   /
>    / Advanced Electronic Concepts, LLC /
>   /           www.aec-lab.com         /
>   ************************************
>=================================================================
>Christopher R. Johnson wrote:
>  
>
>>I have seen references that have Vref  bypass capacitors to both VDD and 
>>GND.  Other references have capacitors only to GND.   Is it really 
>>necessary to have "balanced" capacitors on the Vref lines?  Why?  If the 
>>"balanced" design is desirable, would an X2Y capacitor be a good choice, 
>>since it is "2 capacitors in one"?
>>
>>Regards,
>>
>>Chris Johnson
>>------------------------------------------------------------------
>>    
>>
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