[SI-LIST] Arguments against Thevenin bias/termination for ddr2 Vtt
- From: agathon <hreidmarkailen@xxxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Tue, 29 May 2007 11:10:11 -0700
Hello,
Assume a 50 ohm environment so, for example, a 100 ohm pullup to Vddq (1.8V)
and pulldown to gnd, for Address/Command signal group.
The typical method is to use a lin. regulator with outputs for Vref and Vtt,
so they supposedly track each other better.
The only arguments against the pullup/down I can come up with are:
1. Extra dc current (but the regulator has Vout-Vin losses, too). For
Addr./Cmd it's around 200mA. for a single port, and doesn't increase w/
memory size.
2. The PDN (Vddq) is used dc-coupled, so its behavior statistically
influences Vtt. That is, Vtt is more subject to Vddq and other noise.
3. Vtt is then subject to board PDN resonances.
4. The Thevenin method makes Vin (rcvr) more sensitive to Vddq noise merely
from the linear network analysis point of view, or to Vtt offset at worst
case pullup/down values, than when Vtt is regulated and terminated with 50
ohms (nom.). ... I'm verifying this now; may not be true. I assume 1%
resistors.
5. Uses more pcb space and routing area.
6. Vtt current switching noise is injected into the PDN. Not very nice if
layout or margins are poor.
Arguments in favor:
1. Using Vddq actually may force Vtt to track it better. Regulators
providing Vtt and Vref (with Vddq sense) cannot track Vddq as quickly or
accurately.
2. The dc current penalty is small.
3. ???
Thanks very much.
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