> The timing is very tight on a DDR3-1066MHz bus or on a PCIe-kink, so > every little detail problem on the board may cause the system to fail. > They operate with almost zero margin when the board is well-designed. > Can we predict these with any of the methods? (2D or 3D) The short answer to your question is ... Yes. We are able to correlate various solvers to highly accurate RF measurements of structures and boards. The issue is effectively one of RF signal return locality, as Yuriy discusses. Accuracy of a solver-based solution is proportional to the locality of the RF return path. The larger the area of the return path, the more additional structures and materials that need to be encompassed by the modeling environment, leading to higher cumulative error and variability of the simulation vs. actual results. For highly localized structures, correlation variability is < ? 5%. For poorly localized structures which pull in larger planar areas, correlation variability can approach ? 25%, depending on the frequency band you are interested in. These are, of course, my personal estimates based on the experience of our own internal research, and that of our clients. -- Scott McMorrow Teraspeed Consulting Group LLC 121 North River Drive Narragansett, RI 02882 (401) 284-1827 Business (401) 284-1840 Fax http://www.teraspeed.com Teraspeed? is the registered service mark of Teraspeed Consulting Group LLC - ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List technical documents are available at: http://www.si-list.net List archives are viewable at: //www.freelists.org/archives/si-list Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu