[PCB_FORUM] Re: Constraint Manager
- From: "Gerry Meier" <gerry.meier@xxxxxxxxxxxxxx>
- To: <icu-pcb-forum@xxxxxxxxxxxxx>
- Date: Wed, 23 May 2007 05:28:20 -0700
If you have Allegro Expert use Electrical Cset this is their purpose. If
not and you do not want to do them manually or you can import the rules
using a 3rd party netlist. Create your pin pairs and set up your rules
on one net. Export > Netlist with properties, use the same syntax for he
rest as the one you created manually. Rule should be listed at the
bottom under $Properties another way is to export the CM worksheet add
the rest and import it back in. I have not always had success with this
method.
Gerry
________________________________
From: icu-pcb-forum-bounce@xxxxxxxxxxxxx
[mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx] On Behalf Of Chew Wang
Sent: Wednesday, May 23, 2007 7:20 AM
To: icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] Constraint Manager
Hi all,
I have DDR connections coming to DDR DIMM (J3) from processor (U1) thru
the
series termination. It also has the VTT end termination.
I have defined the net as Xnet, as it makes my length matching simpler.
Now
the problem is:
While using Constraint manager, I need to define pin pair for the match
group. Because I am not bothered regarding the length from DIMM to end
(VTT)
terminations.
So I create pin pairs from U1 to J3.But I need to repeat it for all 64
bit
databus,13bit address,3 clk's etc... which is very hectic work.
Is there any process to make my work simpler..
Regards
Chew.Wang
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