[PCB_FORUM] Re: Constraint Manager
- From: "Macindoe, Gary" <Gary.Macindoe@xxxxxxx>
- To: icu-pcb-forum@xxxxxxxxxxxxx
- Date: Wed, 23 May 2007 10:35:42 -0500
Hectic? ...simpler??
Wow, a while back I was matching the DDR interface manually using a
calculator (without Xnets!).
I guess these days people just want a magic wand effect!!
Once you figure it out and set it up in one design, you import it into
all that follow.
Good luck, not sure how it works with Studio Performance though.
Gary
Gary E. MacIndoe
PCB Design Engineer
Fort Collins, Colorado
amd.com
gary.macindoe@xxxxxxx
________________________________
From: icu-pcb-forum-bounce@xxxxxxxxxxxxx
[mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx] On Behalf Of Chew Wang
Sent: Wednesday, May 23, 2007 6:20 AM
To: icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] Constraint Manager
Hi all,
I have DDR connections coming to DDR DIMM (J3) from processor (U1) thru
the
series termination. It also has the VTT end termination.
I have defined the net as Xnet, as it makes my length matching simpler.
Now
the problem is:
While using Constraint manager, I need to define pin pair for the match
group. Because I am not bothered regarding the length from DIMM to end
(VTT)
terminations.
So I create pin pairs from U1 to J3.But I need to repeat it for all 64
bit
databus,13bit address,3 clk's etc... which is very hectic work.
Is there any process to make my work simpler..
Regards
Chew.Wang
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