[PCB_FORUM] Re: Allegro Sub drawing / Via stitch problem

Having faced this same issue in a recent design, I went the more
quantifiable route. I've created a simple custom report, selecting Net
Name, and Net Via Count, as my two items to report on. One report for
the pre-clipped in board, one for the post-. 
Compare these reports side-by-side in a spreadsheet, add a simple
formula to compare row counts, and highlight any row that does not have
equal vias. At least you can then examine those nets and make an
evaluation.
 
 
Andrew

________________________________

From: icu-pcb-forum-bounce@xxxxxxxxxxxxx
[mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx] On Behalf Of Craig Lewis
Sent: Wednesday, July 29, 2009 8:34 AM
To: icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] Re: Allegro Sub drawing / Via stitch problem


Chris,

That's a slick trick. That will find "all" floating objects.

Thanks,
Craig

cmward@xxxxxxxxxx wrote: 

        Another way to find them is to highlight all nets in Black, only
your vias that are "not on a net" will remain

        

        Thanks,

        Chris

        

        From: icu-pcb-forum-bounce@xxxxxxxxxxxxx
[mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx] On Behalf Of Craig Lewis
        Sent: Wednesday, July 29, 2009 6:38 AM
        To: icu-pcb-forum@xxxxxxxxxxxxx
        Subject: [PCB_FORUM] Re: Allegro Sub drawing / Via stitch
problem

        

        The cleanest way would be to write a short SKILL utility to find
all vias on a dummy net inside that shape. The next easiest would be to
select all via in the shape and do a Show Element on them, save the file
to your favorite text editor and search for "not on a net."
        
        Craig
        
        Mark Salberg wrote: 

        No, I just routed a trace (inside the shape) from a pin to the
vias to force it...Then just export / import to 0,0.
        
        Anyone know how to search for these "floating" vias? Danging via
does not work. Would like to locate any instances  I may have missed.
        
        Thanks,
        Mark 
        
        cadman10@xxxxxxxxxxx wrote: 

        Hello Mark,
        
        Normaly this happens becouse when the vias do not have a net
association they inherit the net name of the first shape they find,B
Have you tried to disable the dynamic shapes on the board first , then
import your subdrawing, then enable the dynamic shapes and force your
imported shape to update first
        
        good luck
        
        cadman

        On Jul 27, 2009, Mark Salberg <msalberg@xxxxxxxxxxxx>
<mailto:msalberg@xxxxxxxxxxxx>  wrote: 

                Not quite that easy Jean,
                Actually stitching to many different power supplies on 8
different layers.
                Just want to keep the import the same as the export.
                Importing clip all at once by 0,0 origin.
                
                Jean Bratton wrote: 

                IF< /u> all of your stitching vias are to GND, then you
can move all of your non-GND positive planes off-board before reading in
the clip. Then the unconnected vias will get associated with GND, and
then you can move the other planes back on the board. 

                

                Jean Bratton

                Senior PCB Designer

                Freedom CAD Services, Inc.

                Office: 603-864-1349

                Email: jean.bratton@xxxxxxxxxxxxxx

                Visit us at http://www.freedomcad.com

                

                

                -----Origi nal Message-----
                From: icu-pcb-forum-bounce@xxxxxxxxxxxxx
[mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx] On Behalf Of Mark Salberg
                Sent: Monday, July 27, 2009 9:04 AM
                To: Cadence User Group
                Subject: [PCB_FORUM] Allegro Sub drawing / Via stitch
problem

                

                Hello all,

                When Exporting a Sub-Drawing I found that any vias in a
shape used for 

                stitching...connected to a shape, but has no traces to a
pin...looses 

                connectivity and sometimes connect to a different plane
after import 

                sub-drawing.

                The only way I have found to fix it is to ALSO route a t
race from a pin 

                to the via to force the connection.

                

                Is there a way to locate any occurrences of this prior
to exporting a 

                Sub-Drawing?

                

                Thought maybe dangling wire reporting as dangling
via...but a Dangling 

                via is defined a a via with only one connection from a
pin. These vias 

                simply dropped in a shape for thermal reasons do not get
flagged.

                

                Any thoughts as to how to find them in a design?

                

                Thanks,

                Mark

                

                

        
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