[PCB_FORUM] Re: Allegro Sub drawing / Via stitch problem

Sounds like a valid request. Anytime you have a via in a shape NOT connected to a pin / pad by a trace...seems to be able to take on different plane net names from time to time.

For this problem, I simply route a trace inside the shape from pin to EACH via.

Regards,
Mark



Dickoff, Diane J wrote:

We have made the request with Cadence in a future release that you can assign a netname to a via. They have not agreed to it yet but it may appear in a future release. If the via is assigned a netname then it would keep that name in export subdrawing. We are asking for it to work with defining B/B vias in a pattern and then copy the pattern with it keeping the correct net names.

Diane.

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*From:* icu-pcb-forum-bounce@xxxxxxxxxxxxx [mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx] *On Behalf Of *Mark Salberg
*Sent:* Monday, July 27, 2009 7:39 AM
*To:* icu-pcb-forum@xxxxxxxxxxxxx
*Subject:* [PCB_FORUM] Re: Allegro Sub drawing / Via stitch problem

Hi Ismail,
I did that and the planes retain their net names with no problem. But, the vias drop their net association.

Thanks for the reply,
Mark

ISMAIL wrote:

Hi Mark,

While Export-Subdrawing, goto the "options" tab in the control panel and check the "Preserve nets of shapes" is enabled.

Try , hope this helps.

Thanks,

Ismail.
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*From:* Mark Salberg <msalberg@xxxxxxxxxxxx> <mailto:msalberg@xxxxxxxxxxxx> *To:* Cadence User Group <icu-pcb-forum@xxxxxxxxxxxxx> <mailto:icu-pcb-forum@xxxxxxxxxxxxx>
*Sent:* Monday, 27 July, 2009 6:33:42 PM
*Subject:* [PCB_FORUM] Allegro Sub drawing / Via stitch problem

Hello all,
When Exporting a Sub-Drawing I found that any vias in a shape used for stitching...connected to a shape, but has no traces to a pin...looses connectivity and sometimes connect to a different plane after import sub-drawing. The only way I have found to fix it is to ALSO route a trace from a pin to the via to force the connection.

Is there a way to locate any occurrences of this prior to exporting a Sub-Drawing?

Thought maybe dangling wire reporting as dangling via...but a Dangling via is defined a a via with only one connection from a pin. These vias simply dropped in a shape for thermal reasons do not get flagged.

Any thoughts as to how to find them in a design?

Thanks,
Mark


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