> > The whole point of what is happening to processor development right now > is that Moore's law is cranking right along doubling the number of > transistors you can put on a chip every couple of years. But, at the > same time, scaling effects have kicked in that make it very very hard to > make those transistors run faster. Used to be the reduction in > transistor size driven by Moore's law automagically gave you faster > transistors. For the last few years that has not been true. You get more > transistors that run at the same, or slightly slower, speeds. So, you > *MUST* make use of parallelism to get better performance. > Another real issue is that as soon as the signals get off chips the slow to a crawl. Even a 800MHz FSB is only a quarter of the speed of the CPU. The approach has been to build bigger pipelines and bigger caches on chip -- thereby reducing the number of off-chip fetches. However with huge pipelines (the Prescot is 31 deep I think) any slight stall is catastrophic. The idea is to simplify the coe CPU a bit and increase the number of them. It will reduce peak speed (at least for serial code) but decrease the effect of stalls and slow devices. -- Rob Chafer Silverfrost --------------------- To unsubscribe go to http://gameprogrammer.com/mailinglist.html